From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id A6939C4360F for ; Wed, 3 Apr 2019 14:10:05 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 74F882084C for ; Wed, 3 Apr 2019 14:10:05 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="QHwlLrSS" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 74F882084C Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description :Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=5KEAEAXlYNAoNvs8Zz1/NJEVsWOrYeyV2MSR9Qs3AUI=; b=QHwlLrSSt0C6Xu j2ODhNyPs4tu9sn0lfKa8/0+oAJ/ViJoN09c+HdmLuOLCO1tkl0/2o4go2CyJyM2ZK5lZ5BNqoVMQ Ple611PFMG6ZwvOK3Rxyimmws67NlvRT0JQQEPQREtkd05VL/UxqknkA6hR8SZAh5BHwDuZbm2EHC J5HJgHC+8/OqyK0WcyTugCNNLzZZJ33GEQAsg2JdenJQSAJBCN+VrNpuBqBpwBsemKra5Er/cK9zH SQSwmCF9/BXjBwi1LExzMAs+v+WWBNYYucrBU46F66xMiRU+C5Ugv/unOP9ocgj/CFMNOjnQuoXJ4 p8pV7EuKJbYga3rbri9w==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hBgaU-0005UH-F2; Wed, 03 Apr 2019 14:09:58 +0000 Received: from foss.arm.com ([217.140.101.70]) by bombadil.infradead.org with esmtp (Exim 4.90_1 #2 (Red Hat Linux)) id 1hBgaS-0005Tj-Br for linux-arm-kernel@lists.infradead.org; Wed, 03 Apr 2019 14:09:57 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C8BF4A78; Wed, 3 Apr 2019 07:09:53 -0700 (PDT) Received: from [10.1.197.45] (e112298-lin.cambridge.arm.com [10.1.197.45]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id B08C43F557; Wed, 3 Apr 2019 07:09:51 -0700 (PDT) Subject: Re: [PATCH] arm64: perf: Do not write event type for cycle counter To: Will Deacon References: <1553766545-27692-1-git-send-email-julien.thierry@arm.com> <20190401080217.r27dgjc43xa5ruzr@blommer> <399b05e9-e309-d5c5-4d41-a672eb4c5d5c@arm.com> <20190403031058.ouek6ecs2xy4dyct@blommer> <2e42ec1f-cc16-d33b-5419-4407c1075d6a@arm.com> <20190403135405.GB16611@fuggles.cambridge.arm.com> From: Julien Thierry Message-ID: <75317146-138f-bdab-e656-6c55bb067152@arm.com> Date: Wed, 3 Apr 2019 15:09:49 +0100 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.2.1 MIME-Version: 1.0 In-Reply-To: <20190403135405.GB16611@fuggles.cambridge.arm.com> Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190403_070956_414034_236CD974 X-CRM114-Status: GOOD ( 19.88 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , Peter Zijlstra , Catalin Marinas , Jiri Olsa , Arnaldo Carvalho de Melo , Alexander Shishkin , Ingo Molnar , huawei.libin@huawei.com, guohanjun@huawei.com, Namhyung Kim , liwei391@huawei.com, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 03/04/2019 14:54, Will Deacon wrote: > On Wed, Apr 03, 2019 at 08:26:20AM +0100, Julien Thierry wrote: >> On 03/04/2019 04:10, Mark Rutland wrote: >>> On Tue, Apr 02, 2019 at 04:42:58PM +0100, Julien Thierry wrote: >>>> On 01/04/2019 09:02, Mark Rutland wrote: >>>>> On Thu, Mar 28, 2019 at 09:49:05AM +0000, Julien Thierry wrote: >>>> Now, I'm thinking what we need is to use a different mask than >>>> EVTYPE_MASK (one that excludes the event bits) when setting >>>> PMCCFILTR_EL0, but still do that when enabling an event using the cycle >>>> counter. >>>> >>>> Does that approach sound correct? Or am I missing something that would >>>> allow us to only set that upon reset? >>> >>> That sounds right to me! >>> >>> It would perhaps be nicer if we could configure event->hwc.config_base to be >>> the raw register value in all cases, but it looks like that's going to be more >>> painful than special-casing the cycle counter here. >>> >> >> Right, I'm gonna need to special case the cycle counter to adapt the >> event type writing to this patch[1]. But since this is not as >> critical/beneficial as I initially thought, I'll just incorporate the >> special-casing to the PMU interrupt as NMI series. > > I'm confused as to what we're actually fixing here. PMCCFILTR_EL0 and > PMEVTYPER_EL0 have the same layout, modulo some RES0 bits, so the > existing code should work fine afaict. > > What's the problem? > None at the moment, I failed to realize that PMSELR did allow to select the counter register. But issues start to arise once we try to replace the "select + access" register with the "direct access" registers for counter and evtype. But that is another story that fits into another patch series. Sorry for the confusion. Thanks, -- Julien Thierry _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel