Re: [RESEND PATCH v4 4/4] arm64: dts: Add MediaTek MT8188 dts and evaluation board and Makefile

["Jason-ch Chen (陳建豪)" <Jason-ch.Chen@mediatek.com>]

Hi Eugen,

On Tue, 2023-10-17 at 11:38 +0300, Eugen Hristev wrote:
> On 9/21/23 09:02, Jason-ch Chen wrote:
> > From: jason-ch chen <Jason-ch.Chen@mediatek.com>
> > 
> > MT8188 is a SoC based on 64bit ARMv8 architecture. It contains 6
> > CA55
> > and 2 CA78 cores. MT8188 share many HW IP with MT65xx series.
> > 
> > We add basic chip support for MediaTek MT8188 on evaluation board.
> > 
> > Signed-off-by: jason-ch chen <Jason-ch.Chen@mediatek.com>
> > Reviewed-by: AngeloGioacchino Del Regno <
> > angelogioacchino.delregno@collabora.com>
> > ---
> >   arch/arm64/boot/dts/mediatek/Makefile       |   1 +
> >   arch/arm64/boot/dts/mediatek/mt8188-evb.dts | 400 ++++++++
> >   arch/arm64/boot/dts/mediatek/mt8188.dtsi    | 951
> > ++++++++++++++++++++
> >   3 files changed, 1352 insertions(+)
> >   create mode 100644 arch/arm64/boot/dts/mediatek/mt8188-evb.dts
> >   create mode 100644 arch/arm64/boot/dts/mediatek/mt8188.dtsi
> > 
> 
> [...]
> 
> > +	soc {
> > +		#address-cells = <2>;
> > +		#size-cells = <2>;
> > +		compatible = "simple-bus";
> > +		ranges;
> > +
> > +		gic: interrupt-controller@c000000 {
> 
> Hi Jason,
> 
> arch/arm64/boot/dts/mediatek/mt8188.dtsi:320.37-341.5: Warning 
> (avoid_unnecessary_addr_size): /soc/interrupt-controller@c000000: 
> unnecessary #address-cells/#size-cells without "ranges" or child
> "reg" 
> property
> 
> 
> This warning pops up when trying dtbs_check.
> Can you have a look please ?

I have run dtbs_check before sending and did not encounter this
warning. I will perform another confirmation before sending the next
version.

Thank you.

> 
> Eugen
> 
> > +			compatible = "arm,gic-v3";
> > +			#interrupt-cells = <4>;
> > +			#address-cells = <2>;
> > +			#size-cells = <2>;
> > +			#redistributor-regions = <1>;
> > +			interrupt-parent = <&gic>;
> > +			interrupt-controller;
> > +			reg = <0 0x0c000000 0 0x40000>,
> > +			      <0 0x0c040000 0 0x200000>;
> > +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH 0>;
> > +
> > +			ppi-partitions {
> > +				ppi_cluster0: interrupt-partition-0 {
> > +					affinity = <&cpu0 &cpu1 &cpu2
> > &cpu3 &cpu4 &cpu5>;
> > +				};
> > +
> > +				ppi_cluster1: interrupt-partition-1 {
> > +					affinity = <&cpu6 &cpu7>;
> > +				};
> > +			};
> > +		};
> > +
> 
> [...]
> 

Regards,
Jason
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