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Tue, 8 Sep 2020 10:52:01 -0500 Received: from DLEE103.ent.ti.com (157.170.170.33) by DLEE102.ent.ti.com (157.170.170.32) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3; Tue, 8 Sep 2020 10:52:00 -0500 Received: from lelv0326.itg.ti.com (10.180.67.84) by DLEE103.ent.ti.com (157.170.170.33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1979.3 via Frontend Transport; Tue, 8 Sep 2020 10:52:00 -0500 Received: from [10.250.34.59] (ileax41-snat.itg.ti.com [10.172.224.153]) by lelv0326.itg.ti.com (8.15.2/8.15.2) with ESMTP id 088Fq0cq120219; Tue, 8 Sep 2020 10:52:00 -0500 Subject: Re: [v4,4/4] arm64: dts: mt8192: add infracfg_rst node To: Crystal Guo References: <20200817030324.5690-1-crystal.guo@mediatek.com> <20200817030324.5690-5-crystal.guo@mediatek.com> <211bd78f-3b70-1e65-eea9-75cc73a3dfdd@ti.com> <1599571618.14806.7.camel@mhfsdcap03> From: Suman Anna Message-ID: <77432990-4a0e-e8cd-5dec-772ea9110630@ti.com> Date: Tue, 8 Sep 2020 10:51:55 -0500 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.10.0 MIME-Version: 1.0 In-Reply-To: <1599571618.14806.7.camel@mhfsdcap03> Content-Language: en-US X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200908_115206_522501_DE852ED2 X-CRM114-Status: GOOD ( 20.08 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "devicetree@vger.kernel.org" , =?UTF-8?B?WW9uZyBMaWFuZyAo5qKB5YuHKQ==?= , srv_heupstream , =?UTF-8?B?U2VpeWEgV2FuZyAo546L6L+65ZCbKQ==?= , "linux-kernel@vger.kernel.org" , =?UTF-8?B?RmFuIENoZW4gKOmZs+WHoSk=?= , "robh+dt@kernel.org" , "linux-mediatek@lists.infradead.org" , "p.zabel@pengutronix.de" , "matthias.bgg@gmail.com" , =?UTF-8?B?WWluZ2pvZSBDaGVuICjpmbPoi7HmtLIp?= , =?UTF-8?B?U3RhbmxleSBDaHUgKOacseWOn+mZnik=?= , "linux-arm-kernel@lists.infradead.org" Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/8/20 8:26 AM, Crystal Guo wrote: > On Thu, 2020-09-03 at 07:29 +0800, Suman Anna wrote: >> Hi Crystal, >> >> On 8/16/20 10:03 PM, Crystal Guo wrote: >>> add infracfg_rst node which is for MT8192 platform >>> >>> Signed-off-by: Crystal Guo >> >> I understand you are posting these together for complete reference, but driver >> subsystem maintainers typically don't pick dts patches. In anycase, can you >> clarify if your registers are self-clearing registers? >> >> regards >> Suman >> > Hi Suman, > > Thanks for your reply. > Our reset registers are not self-clearing, it needs to set the clear bit > to 1 to clear the related bit. > And should I separate this dts patch from the patch sets? Typically yes, but will leave it upto Philipp and Mediatek DT maintainers. regards Suman > > regards > Crystal >>> --- >>> arch/arm64/boot/dts/mediatek/mt8192.dtsi | 11 ++++++++++- >>> 1 file changed, 10 insertions(+), 1 deletion(-) >>> >>> diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi >>> index 931e1ca17220..a0cb9904706b 100644 >>> --- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi >>> +++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi >>> @@ -10,6 +10,7 @@ >>> #include >>> #include >>> #include >>> +#include >>> >>> / { >>> compatible = "mediatek,mt8192"; >>> @@ -219,9 +220,17 @@ >>> }; >>> >>> infracfg: infracfg@10001000 { >>> - compatible = "mediatek,mt8192-infracfg", "syscon"; >>> + compatible = "mediatek,mt8192-infracfg", "syscon", "simple-mfd"; >>> reg = <0 0x10001000 0 0x1000>; >>> #clock-cells = <1>; >>> + >>> + infracfg_rst: reset-controller { >>> + compatible = "mediatek,infra-reset", "ti,syscon-reset"; >>> + #reset-cells = <1>; >>> + ti,reset-bits = < >>> + 0x140 15 0x144 15 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* 0: pcie */ >>> + >; >>> + }; >>> }; >>> >>> pericfg: pericfg@10003000 { >>> >> > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel