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pinctrl: qcom: Add Kuno pinctrl driver To: Abel Vesa Cc: Bjorn Andersson , Konrad Dybcio , Krzysztof Kozlowski , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Ulf Hansson , Michael Turquette , Stephen Boyd , Brian Masney , Taniya Das , Georgi Djakov , Bartosz Golaszewski , Linus Walleij , Thomas Gleixner , Radu Rendec , Robert Marko , Guru Das Srinagesh , linux-arm-msm@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-pm@vger.kernel.org, linux-clk@vger.kernel.org, linux-gpio@vger.kernel.org References: <20260821-kuno-soc-support-v3-0-196e2b306368@oss.qualcomm.com> <20260821-kuno-soc-support-v3-9-196e2b306368@oss.qualcomm.com> <7ywfd3hfzngejfprv5zkn65kci52q5tgiq5h3sccpz35ov5eq4@ow4edd5epaws> Content-Language: en-US From: Hardeep Sharma In-Reply-To: <7ywfd3hfzngejfprv5zkn65kci52q5tgiq5h3sccpz35ov5eq4@ow4edd5epaws> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit 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X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/24/2026 1:20 PM, Abel Vesa wrote: > On 26-08-21 21:39:02, Hardeep Sharma wrote: >> Add the TLMM pinctrl driver for the Qualcomm Kuno platform, supporting >> 110 GPIOs and their pin multiplexing, pin configuration and gpiolib >> interface through the common pinctrl-msm driver. >> >> Signed-off-by: Hardeep Sharma >> --- >> drivers/pinctrl/qcom/Kconfig.msm | 11 + >> drivers/pinctrl/qcom/Makefile | 1 + >> drivers/pinctrl/qcom/pinctrl-kuno.c | 801 ++++++++++++++++++++++++++++++++++++ >> 3 files changed, 813 insertions(+) >> > [...] > >> diff --git a/drivers/pinctrl/qcom/pinctrl-kuno.c b/drivers/pinctrl/qcom/pinctrl-kuno.c >> new file mode 100644 >> index 000000000000..f3f8ec3e09de >> --- /dev/null >> +++ b/drivers/pinctrl/qcom/pinctrl-kuno.c >> @@ -0,0 +1,801 @@ >> +// SPDX-License-Identifier: GPL-2.0-only >> +/* >> + * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. >> + */ >> + >> +#include >> +#include >> +#include >> + >> +#include "pinctrl-msm.h" > [...] > >> + >> +static const struct pinfunction kuno_functions[] = { >> + MSM_GPIO_PIN_FUNCTION(gpio), >> + MSM_PIN_FUNCTION(audio_ref_clk), >> + MSM_PIN_FUNCTION(coex_uart), >> + MSM_PIN_FUNCTION(ebi2_lcd_a), >> + MSM_PIN_FUNCTION(ebi2_lcd_cs), >> + MSM_PIN_FUNCTION(ebi2_lcd_reset), >> + MSM_PIN_FUNCTION(ebi2_lcd_te), >> + MSM_PIN_FUNCTION(emac_mdc), >> + MSM_PIN_FUNCTION(emac_mdio), >> + MSM_PIN_FUNCTION(emac_pps_in), >> + MSM_PIN_FUNCTION(emac_ptp_aux), >> + MSM_PIN_FUNCTION(emac_ptp_pps), >> + MSM_PIN_FUNCTION(gcc_gp1_clk), >> + MSM_PIN_FUNCTION(gcc_gp2_clk), >> + MSM_PIN_FUNCTION(gcc_gp3_clk), >> + MSM_PIN_FUNCTION(mi2s0_data0), >> + MSM_PIN_FUNCTION(mi2s0_data1), >> + MSM_PIN_FUNCTION(mi2s0_sck), >> + MSM_PIN_FUNCTION(mi2s0_ws), >> + MSM_PIN_FUNCTION(mi2s1_data0), >> + MSM_PIN_FUNCTION(mi2s1_data1), >> + MSM_PIN_FUNCTION(mi2s1_sck), >> + MSM_PIN_FUNCTION(mi2s1_ws), >> + MSM_PIN_FUNCTION(mi2s_mclk), >> + MSM_PIN_FUNCTION(nav_gpio), >> + MSM_PIN_FUNCTION(pci_e_rst), >> + MSM_PIN_FUNCTION(pcie_clkreq_n), >> + MSM_PIN_FUNCTION(pll_bist_sync), >> + MSM_PIN_FUNCTION(pll_clk_aux), >> + MSM_PIN_FUNCTION(qdss_cti_trig0), >> + MSM_PIN_FUNCTION(qdss_cti_trig1), >> + MSM_PIN_FUNCTION(qdss_cti_trig1_mire), >> + MSM_PIN_FUNCTION(qdss_gpio_traceclk), >> + MSM_PIN_FUNCTION(qdss_gpio_tracectl), >> + MSM_PIN_FUNCTION(qup0_se0), >> + MSM_PIN_FUNCTION(qup0_se1), >> + MSM_PIN_FUNCTION(qup0_se2), >> + MSM_PIN_FUNCTION(qup0_se3_mira), >> + MSM_PIN_FUNCTION(qup0_se3_mirb), >> + MSM_PIN_FUNCTION(qup0_se4), >> + MSM_PIN_FUNCTION(sdc4_clk), >> + MSM_PIN_FUNCTION(sdc4_cmd), >> + MSM_PIN_FUNCTION(sdc4_data), >> + MSM_PIN_FUNCTION(sdc4_tb_trig), >> + MSM_PIN_FUNCTION(sgmii_phy_intr), >> + MSM_PIN_FUNCTION(spmi_coex_clk), >> + MSM_PIN_FUNCTION(spmi_coex_data), >> + MSM_PIN_FUNCTION(spmi_vgi_hwevent), >> + MSM_PIN_FUNCTION(uim1_clk), >> + MSM_PIN_FUNCTION(uim1_data), >> + MSM_PIN_FUNCTION(uim1_present), >> + MSM_PIN_FUNCTION(uim1_reset), >> + MSM_PIN_FUNCTION(usb2phy_ac_en), >> +}; >> + >> +/* Every pin is maintained as a single group, and missing or non-existing pin >> + * would be maintained as dummy group to synchronize pin group index with >> + * pin descriptor registered with pinctrl core. >> + * Clients would not be able to request these dummy pin groups. >> + */ >> +static const struct msm_pingroup kuno_groups[] = { >> + [0] = PINGROUP(0, uim1_data, NA, NA, NA, NA, NA, NA, NA, NA), > We use underscores instead of NA here. > > Please compare to the older SoCs in upstream. Thanks for review. Corrected in v4 : https://lore.kernel.org/all/20260827-kuno-soc-support-v4-0-dd34f235fc1a@oss.qualcomm.com/ Best Wishes Hardeep Sharma