From: Vincent Knecht <vincent.knecht@mailoo.org>
To: Sai Prakash Ranjan <quic_saipraka@quicinc.com>,
Will Deacon <will@kernel.org>,
Robin Murphy <robin.murphy@arm.com>,
Joerg Roedel <joro@8bytes.org>
Cc: iommu@lists.linux-foundation.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org,
quic_guptap@quicinc.com, Rob Clark <robdclark@chromium.org>,
Bjorn Andersson <bjorn.andersson@linaro.org>
Subject: Re: [PATCHv2] iommu/arm-smmu-qcom: Add debug support for TLB sync timeouts
Date: Wed, 08 Jun 2022 23:22:58 +0200 [thread overview]
Message-ID: <78f1adee5c6e0c3547c116d0e78fe5b70f9c15e1.camel@mailoo.org> (raw)
In-Reply-To: <20220526041403.9984-1-quic_saipraka@quicinc.com>
Le jeudi 26 mai 2022 à 09:44 +0530, Sai Prakash Ranjan a écrit :
> TLB sync timeouts can be due to various reasons such as TBU power down
> or pending TCU/TBU invalidation/sync and so on. Debugging these often
> require dumping of some implementation defined registers to know the
> status of TBU/TCU operations and some of these registers are not
> accessible in non-secure world such as from kernel and requires SMC
> calls to read them in the secure world. So, add this debug support
> to dump implementation defined registers for TLB sync timeout issues.
>
> Signed-off-by: Sai Prakash Ranjan <quic_saipraka@quicinc.com>
> ---
>
> Changes in v2:
> * Use scm call consistently so that it works on older chipsets where
> some of these regs are secure registers.
> * Add device specific data to get the implementation defined register
> offsets.
>
> ---
> drivers/iommu/arm/arm-smmu/arm-smmu-qcom.c | 161 ++++++++++++++++++---
> drivers/iommu/arm/arm-smmu/arm-smmu.c | 2 +
> drivers/iommu/arm/arm-smmu/arm-smmu.h | 1 +
> 3 files changed, 146 insertions(+), 18 deletions(-)
Hi Sai, and thanks for this patch !
I've encountered TLB sync timeouts with msm8939 SoC recently.
What would be needed to add to this patch so this SoC is supported ?
Like, where could one check the values to be used in an equivalent
of qcom_smmu_impl0_reg_offset values for this SoC (if any change needed) ?
Current values are not found by simply greping in downstream/vendor dtsi/dts files...
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next prev parent reply other threads:[~2022-06-08 21:24 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-05-26 4:14 [PATCHv2] iommu/arm-smmu-qcom: Add debug support for TLB sync timeouts Sai Prakash Ranjan
2022-06-08 21:22 ` Vincent Knecht [this message]
2022-06-09 8:00 ` Sai Prakash Ranjan
2022-06-23 6:02 ` Sai Prakash Ranjan
2022-07-05 5:05 ` Sai Prakash Ranjan
2022-07-06 11:56 ` Will Deacon
2022-07-07 6:20 ` Sai Prakash Ranjan
2022-07-06 16:45 ` Robin Murphy
2022-07-07 7:53 ` Sai Prakash Ranjan
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