Re: [PATCH 2/3] soc: mediatek: cmdq-helper: add legacy GCE ISA support

[AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>]

On 7/28/26 17:47, Roman Vivchar wrote:
> Hi Angelo,
> 
> On Tuesday, July 28th, 2026 at 6:08 PM, AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> wrote:
> 
>> On 7/28/26 11:42, Roman Vivchar via B4 Relay wrote:
>>> From: Roman Vivchar <rva333@protonmail.com>
>>>
>>> Some SoCs, such as mt6572, have different WRITE and POLL instruction
>>> encoding. Instead of 16-bit offset and 8-bit subsystem ID, old GCEs have
>>> 22-bit offset and 2-bit subsystem ID.
>>
>> What about poll_addr, mask, write_s, write_s_mask and others?
> 
> These don't seem to exist in all 65xx except 6595. TL;DR - old GCEs are
> essentially dumb compared to newer ones. They have only basics like MASK (0x2),
> WRITE (0x4), POLL (0x8), JUMP (0x10), WFE (0x20) and EOC (0x40). All logical
> operations as well as GPR/SPR don't seem to exist.
> 
> cmdq_pkt_poll_addr, write_s, write_s_mask are not used by the DRM subsystem.
> mask is the same across all GCEs because it takes only u32 mask without
> address.
> 
>> Not sure that this will actually work reliably (though I'm sure you're not
>> creating any regression).
> 
> I have tested this change (on top of out-of-tree mt6572 DRM) with some
> dd if=/dev/urandom of=/dev/null spam + modetest, as well as igt. Seems to
> work without issues...
> 
> Best regards,
> Roman

Alright then - look, I'd really want to pick this one up, but it's a bit late
in the cycle and I don't really have much time left for testing.

I'm sure that this is fine, but please understand me - I can't take this now,
also because I'm going on holiday very soon and can't be here to take care of
sudden breakages.

I wonder if you could resend it in the next cycle, preferrably at the beginning?

Meanwhile, I'll get this series on the Collabora trees so that it gets cycled by
the CI a bit (though, it's not enough, because that needs to be tested manually).

Cheers,
Angelo