Re: [PATCH] drivers: altera_edac: Guard SDRAM irq2 retrieval for Arria10 only

["Nazle Asmade, Muhammad Nazim Amirul" <muhammad.nazim.amirul.nazle.asmade@altera.com>]

On 13/5/2026 6:45 pm, Dinh Nguyen wrote:
> 
> 
> On 5/12/26 06:51, Nazle Asmade, Muhammad Nazim Amirul wrote:
>> On 12/5/2026 7:25 pm, Dinh Nguyen wrote:
>>>
>>>
>>> On 5/11/26 20:37, Nazle Asmade, Muhammad Nazim Amirul wrote:
>>>> On 11/5/2026 7:54 pm, Dinh Nguyen wrote:
>>>>>
>>>>>
>>>>> On 5/8/26 02:52, muhammad.nazim.amirul.nazle.asmade@altera.com wrote:
>>>>>> From: Nazim Amirul <muhammad.nazim.amirul.nazle.asmade@altera.com>
>>>>>>
>>>>>> Guard the irq2 retrieval with an of_machine_is_compatible() check so
>>>>>> that platform_get_irq(pdev, 1) is only called on Arria10 platforms.
>>>>>>
>>>>>> Signed-off-by: Nazim Amirul
>>>>>> <muhammad.nazim.amirul.nazle.asmade@altera.com>
>>>>>> Signed-off-by: Niravkumar L Rabara <nirav.rabara@altera.com>
>>>>>> ---
>>>>>>     drivers/edac/altera_edac.c | 3 ++-
>>>>>>     1 file changed, 2 insertions(+), 1 deletion(-)
>>>>>>
>>>>>> diff --git a/drivers/edac/altera_edac.c b/drivers/edac/altera_edac.c
>>>>>> index 4edd2088c2db..b30302198cd4 100644
>>>>>> --- a/drivers/edac/altera_edac.c
>>>>>> +++ b/drivers/edac/altera_edac.c
>>>>>> @@ -348,7 +348,8 @@ static int altr_sdram_probe(struct 
>>>>>> platform_device
>>>>>> *pdev)
>>>>>>         }
>>>>>>         /* Arria10 has a 2nd IRQ */
>>>>>> -    irq2 = platform_get_irq(pdev, 1);
>>>>>> +    if (of_machine_is_compatible("altr,socfpga-arria10"))
>>>>>> +        irq2 = platform_get_irq(pdev, 1);
>>>>>>         layers[0].type = EDAC_MC_LAYER_CHIP_SELECT;
>>>>>>         layers[0].size = 1;
>>>>>
>>>>> Why? We already switch on arria10 later in the same function.
>>>>>
>>>>> Sorry, but NAK.
>>>>>
>>>>> Dinh
>>>> This driver were used by cyclone5 and arria10. Cyclone5 only has one
>>>> interrupt whereby arria10 has 2 interrupt. That is the reason why the
>>>> interrupt was guard by (of_machine_is_compatible("altr,socfpga- 
>>>> arria10"))
>>>>
>>>
>>> Yes, but look at line 397,
>>>
>>>             /* Only the Arria10 has separate IRQs */
>>>           if (of_machine_is_compatible("altr,socfpga-arria10")) {
>>>                   /* Arria10 specific initialization */
>>>
>>> Dinh
>>>
>>>
>> Hi Dinh, That is true, but the one that we looking at now is at line 352
>> which enabling the second interrupt and it is not required by cyclone5.
>> Perhaps are you saying we should move the irq2 at line 352 under this
>> line 397?
> 
> Yes, that would be fine.
> 
> Dinh
> 
changes applied on v2!

https://lore.kernel.org/all/20260514034007.11541-1-muhammad.nazim.amirul.nazle.asmade@altera.com/

regards,
Nazim