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Tue, 19 May 2020 12:47:50 -0700 (PDT) Subject: Re: [PATCH 00/11] arm/arm64: Turning IPIs into normal interrupts From: Florian Fainelli To: Marc Zyngier , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org References: <20200519161755.209565-1-maz@kernel.org> Message-ID: <7b06f351-40f3-74c3-5d16-d7d58ab490b6@gmail.com> Date: Tue, 19 May 2020 12:47:44 -0700 User-Agent: Mozilla/5.0 (Windows NT 10.0; WOW64; rv:68.0) Gecko/20100101 Firefox/68.0 Thunderbird/68.8.0 MIME-Version: 1.0 In-Reply-To: Content-Language: en-US X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200519_124751_903713_9D1B86FF X-CRM114-Status: GOOD ( 18.90 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Sumit Garg , Russell King , Jason Cooper , Will Deacon , Catalin Marinas , Thomas Gleixner , kernel-team@android.com Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 5/19/2020 10:50 AM, Florian Fainelli wrote: > > > On 5/19/2020 9:17 AM, Marc Zyngier wrote: >> For as long as SMP ARM has existed, IPIs have been handled as >> something special. The arch code and the interrupt controller exchange >> a couple of hooks (one to generate an IPI, another to handle it). >> >> Although this is perfectly manageable, it prevents the use of features >> that we could use if IPIs were Linux IRQs (such as pseudo-NMIs). It >> also means that each interrupt controller driver has to follow an >> architecture-specific interface instead of just implementing the base >> irqchip functionnalities. The arch code also duplicates a number of >> things that the core irq code already does (such as calling >> set_irq_regs(), irq_enter()...). >> >> This series tries to remedy this on arm/arm64 by offering a new >> registration interface where the irqchip gives the arch code a range >> of interrupts to use for IPIs. The arch code requests these as normal >> interrupts. >> >> The bulk of the work is at the interrupt controller level, where all 3 >> irqchips used on arm64 get converted. >> >> Finally, the arm64 code drops the legacy registration interface. The >> same thing could be done on 32bit as well once the two remaining >> irqchips using that interface get converted. >> >> There is probably more that could be done: statistics are still >> architecture-private code, for example, and no attempt is made to >> solve that (apart from hidding the IRQs from /proc/interrupt). >> >> This has been tested on a bunch of 32 and 64bit guests. > > Does this patch series change your position on this patch series > > https://lore.kernel.org/linux-arm-kernel/20191023000547.7831-3-f.fainelli@gmail.com/T/ > > or is this still a no-no? Our firmware specifies SGI interrupts with the first interrupt cell specifier set to 2, so changing GIC_IRQ_TYPE_SGI to 2 allows me to use a nearly unmodified firmware with your changes, sweet! I know this is not supposed to be used that way, but the temptation was too big. FWIW, on ARM64: Tested-by: Florian Fainelli -- Florian _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel