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dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.117.161 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.117.161; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.117.161) by SJ1PEPF00002323.mail.protection.outlook.com (10.167.242.85) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.21.159.10 via Frontend Transport; Wed, 24 Jun 2026 20:47:12 +0000 Received: from rnnvmail201.nvidia.com (10.129.68.8) by mail.nvidia.com (10.129.200.67) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 24 Jun 2026 13:46:52 -0700 Received: from [10.221.135.3] (10.126.230.37) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Wed, 24 Jun 2026 13:46:49 -0700 Message-ID: <7c23a6e4-31bc-4803-8c67-63f5d4e94593@nvidia.com> Date: Wed, 24 Jun 2026 22:46:46 +0200 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v2 4/8] firmware: smccc: lfa: Add timeout and trigger watchdog To: Andre Przywara , Mark Rutland , Lorenzo Pieralisi , "Sudeep Holla" References: <20260317103336.1273582-1-andre.przywara@arm.com> <20260317103336.1273582-5-andre.przywara@arm.com> Content-Language: en-US From: Nirmoy Das In-Reply-To: <20260317103336.1273582-5-andre.przywara@arm.com> Content-Type: text/plain; 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X-MS-Exchange-AntiSpam-MessageData-ChunkCount: 1 X-MS-Exchange-AntiSpam-MessageData-0: b+Plp1J7qtqmZQ42Cyj5EOn0QgWwLZgi/l5TPlBPMHzxtj0FE0IYh3dO3VzBAGGkt/2nmRAX6BkkZt6JN16kX0Z2dL9KCb6kjbeJx8f4eW0SxJMo90rStDUA181tof5gpYilXuLmPRGlhx52WB8tyoqi3oLhgUuy+qKEM9PAYnhso3ikLAKlnSlITr5PkXCJV63T7Gu1/BR6fgiTbIdm71fwUtzeb6Je4qGuT45tRxiWdkJj7YghzJsUuhv8NTuPiYDjA49XugHlITmc1zxUXS0FsmFf1tCk6hhmW01244OYsi5NePmt3CVD1hhD4Urupc/1NFxIs6ha9E6tQb3rir9m+HB+WmB1EfrVQnIRPR0eTfcHoDqZ6iLd4kYFjYjFthqqwsdHFO2un/SzcKa0xg4Pl7pErkBoJYMPxi1SlpgHCUAeF0Kh1bfTtcZFNiCE X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 24 Jun 2026 20:47:12.3140 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 3078e8b5-af4b-4a98-9fb9-08ded231c467 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SJ1PEPF00002323.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: PH7PR12MB7186 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260624_134720_987834_24C8F00A X-CRM114-Status: GOOD ( 21.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: vsethi@nvidia.com, Salman Nabi , linux-kernel@vger.kernel.org, vwadekar@nvidia.com, Trilok Soni , linux-arm-kernel@lists.infradead.org Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Andre, Veda, On 17.03.26 12:33, Andre Przywara wrote: > From: Vedashree Vidwans > > Enhance PRIME/ACTIVATION functions to touch watchdog and implement > timeout mechanism. This update ensures that any potential hangs are > detected promptly and that the LFA process is allocated sufficient > execution time before the watchdog timer expires. These changes improve > overall system reliability by reducing the risk of undetected process > stalls and unexpected watchdog resets. > > Signed-off-by: Vedashree Vidwans > Signed-off-by: Andre Przywara > --- > drivers/firmware/smccc/lfa_fw.c | 43 ++++++++++++++++++++++++++++++--- > 1 file changed, 39 insertions(+), 4 deletions(-) > > diff --git a/drivers/firmware/smccc/lfa_fw.c b/drivers/firmware/smccc/lfa_fw.c > index 4831abf2b60e..d1b5cd29b8a0 100644 > --- a/drivers/firmware/smccc/lfa_fw.c > +++ b/drivers/firmware/smccc/lfa_fw.c > @@ -5,11 +5,14 @@ > > #include > #include > +#include > #include > #include > #include > +#include > #include > #include > +#include > #include > #include > #include > @@ -38,6 +41,11 @@ > #define LFA_PRIME_CALL_AGAIN BIT(0) > #define LFA_ACTIVATE_CALL_AGAIN BIT(0) > > +#define LFA_PRIME_BUDGET_MS 30000 /* 30s cap */ > +#define LFA_PRIME_DELAY_MS 10 /* 10ms between polls */ > +#define LFA_ACTIVATE_BUDGET_MS 10000 /* 10s cap */ > +#define LFA_ACTIVATE_DELAY_MS 10 /* 10ms between polls */ > + > /* LFA return values */ > #define LFA_SUCCESS 0 > #define LFA_NOT_SUPPORTED 1 > @@ -287,6 +295,7 @@ static int call_lfa_activate(void *data) > struct fw_image *image = data; > struct arm_smccc_1_2_regs reg = { 0 }, res; > > + touch_nmi_watchdog(); > reg.a0 = LFA_1_0_FN_ACTIVATE; > reg.a1 = image->fw_seq_id; > /* > @@ -310,6 +319,7 @@ static int call_lfa_activate(void *data) > > static int activate_fw_image(struct fw_image *image) > { > + ktime_t end = ktime_add_ms(ktime_get(), LFA_ACTIVATE_BUDGET_MS); > int ret; > > retry: > @@ -324,8 +334,15 @@ static int activate_fw_image(struct fw_image *image) > return 0; > } > > - if (ret == -LFA_CALL_AGAIN) > - goto retry; > + if (ret == -LFA_CALL_AGAIN) { > + /* SMC returned with call_again flag set */ > + if (ktime_before(ktime_get(), end)) { > + msleep_interruptible(LFA_ACTIVATE_DELAY_MS); > + goto retry; > + } > + > + ret = -LFA_TIMED_OUT; > + } > > lfa_cancel(image); Correct me if I am wrong here DEN0147 2.6.6: LFA_ACTIVATE can return LFA_BUSY ("activation postponed ... prime status not changed"), i.e. retriable like CALL_AGAIN. So we need:       if (ret == -LFA_BUSY) {           if (ktime_before(ktime_get(), end)) {               msleep_interruptible(LFA_ACTIVATE_DELAY_MS);               goto retry;           }           ret = -LFA_TIMED_OUT;       } Regards, Nirmoy > > @@ -338,6 +355,8 @@ static int activate_fw_image(struct fw_image *image) > static int prime_fw_image(struct fw_image *image) > { > struct arm_smccc_1_2_regs reg = { 0 }, res; > + ktime_t end = ktime_add_ms(ktime_get(), LFA_PRIME_BUDGET_MS); > + int ret; > > if (image->may_reset_cpu) { > pr_err("CPU reset not supported by kernel driver\n"); > @@ -345,6 +364,8 @@ static int prime_fw_image(struct fw_image *image) > return -EINVAL; > } > > + touch_nmi_watchdog(); > + > reg.a0 = LFA_1_0_FN_PRIME; > retry: > /* > @@ -363,8 +384,22 @@ static int prime_fw_image(struct fw_image *image) > return res.a0; > } > > - if (res.a1 & LFA_PRIME_CALL_AGAIN) > - goto retry; > + if (res.a1 & LFA_PRIME_CALL_AGAIN) { > + /* SMC returned with call_again flag set */ > + if (ktime_before(ktime_get(), end)) { > + msleep_interruptible(LFA_PRIME_DELAY_MS); > + goto retry; > + } > + > + pr_err("LFA_PRIME for image %s timed out", > + get_image_name(image)); > + > + ret = lfa_cancel(image); > + if (ret != 0) > + return ret; > + > + return -ETIMEDOUT; > + } > > return 0; > }