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From: anjiandi@codeaurora.org (Jiandi An)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 2/3] [v3] pinctrl: qcom: disable GPIO groups with no pins
Date: Wed, 16 Aug 2017 13:10:12 -0500	[thread overview]
Message-ID: <7c278367-bf3b-6a26-e31f-ee696cb5534e@codeaurora.org> (raw)
In-Reply-To: <d0b16753-b202-5756-1cba-1cd083af52ed@codeaurora.org>

During a kexec shutdown, machine_kexec_mask_interrupts() will attempt
to disable all IRQs that are registered.  If gpio is not available,
don't register IRQs and it won't be in the irq_desc list it walks through.

If gpio is unavailable, perhaps a more correct fix that covers more is 
to not calling gpiochip_irqchip_add() to register msm_gpio_irq_chip in 
msm_gpio_init().

When registering interrupt for msm_qpio_irq_chip the following are 
registered, not just irq_mask and irq_unmask.

static struct irq_chip msm_gpio_irq_chip = {
	.name           = "msmgpio",
	.irq_mask       = msm_gpio_irq_mask,
	.irq_unmask     = msm_gpio_irq_unmask,
	.irq_ack        = msm_gpio_irq_ack,
	.irq_set_type   = msm_gpio_irq_set_type,
	.irq_set_wake   = msm_gpio_irq_set_wake,
};

Technically the same check added in msm_gpio_irq_mask() and 
msm_gpio_irq_unmask() should be added in msm_gpio_irq_ack(), 
msm_gpio_irq_set_type(), and msm_gpio_irq_set_wake() if it's registered 
with irq domain.

To cover more bases, the more correct way is to not register interrupt 
with irq domain at all if gpio is unavailable.


On 08/09/2017 02:02 PM, Timur Tabi wrote:
> On 07/31/2017 08:36 AM, Linus Walleij wrote:
>>> To support sparse GPIO maps, pinctrl-msm client drivers can specify
>>> that a given GPIO has a pin count of zero.  These GPIOs will be
>>> considered "hidden".  Any attempt to claim the GPIO will fail, and they
>>> will not be listed in debugfs.
>>>
>>> During a kexec shutdown, machine_kexec_mask_interrupts() will attempt
>>> to disable all IRQs, even those that aren't enabled.  This includes
>>> GPIOs that are unavailable (npins == 0), so add a check to the irq mask
>>> and unmask functions.
>>>
>>> Signed-off-by: Timur Tabi<timur@codeaurora.org>
>
>> I'm waiting for Bj?rn's review of the two remaining patches.
>
> Bj?rn, do you have time to review these patches?  I'm hoping to get them
> into 4.14.
>

-- 
Jiandi An
Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm 
Technologies, Inc.
Qualcomm Technologies, Inc. is a member of the Code Aurora Forum, a 
Linux Foundation Collaborative Project.

  reply	other threads:[~2017-08-16 18:10 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2017-07-27 18:19 [PATCH 0/3][v3] pinctrl: qcom: add support for sparse GPIOs Timur Tabi
2017-07-27 18:19 ` [PATCH 1/3] gliolib: request the gpio before querying its direction Timur Tabi
2017-07-31 13:35   ` Linus Walleij
2017-08-21 21:23     ` Timur Tabi
2017-08-23  8:32       ` Linus Walleij
2017-08-23 23:28         ` Timur Tabi
2017-08-24 21:28           ` Linus Walleij
2017-08-24 22:00             ` Timur Tabi
2017-07-27 18:19 ` [PATCH 2/3] [v3] pinctrl: qcom: disable GPIO groups with no pins Timur Tabi
2017-07-31 13:36   ` Linus Walleij
2017-08-09 19:02     ` Timur Tabi
2017-08-16 18:10       ` Jiandi An [this message]
2017-08-16 18:32         ` Timur Tabi
2017-08-16 19:30           ` Jiandi An
2017-08-16 19:31           ` Jiandi An
2017-08-16 19:55             ` Timur Tabi
2017-07-27 18:19 ` [PATCH 3/3] [v2] pinctrl: qcom: qdf2xxx: add support for new ACPI HID QCOM8002 Timur Tabi

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