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Fri, 26 Sep 2025 09:43:33 -0700 (PDT) X-Google-Smtp-Source: AGHT+IH5vWBMgBvL7brIlV8nI5zcGRZcgZLch/n6zvZd8dJYGcdbkBvuKaAP5Kh0UT+1HHmZItjGyg== X-Received: by 2002:a05:6a00:2186:b0:77f:2899:d443 with SMTP id d2e1a72fcca58-780fce1d14fmr7444655b3a.10.1758905012812; Fri, 26 Sep 2025 09:43:32 -0700 (PDT) Received: from [192.168.29.113] ([49.43.224.88]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-781023c8aebsm4809340b3a.28.2025.09.26.09.43.24 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 26 Sep 2025 09:43:32 -0700 (PDT) Message-ID: <7cd09815-a657-47cc-9cc2-3751996c3592@oss.qualcomm.com> Date: Fri, 26 Sep 2025 22:13:22 +0530 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 8/9] PCI: pwrctrl: Add power control driver for tc9563 To: Bjorn Helgaas Cc: Bjorn Helgaas , Lorenzo Pieralisi , Rob Herring , Krzysztof Kozlowski , Conor Dooley , chaitanya chundru , Bjorn Andersson , Konrad Dybcio , cros-qcom-dts-watchers@chromium.org, Jingoo Han , Bartosz Golaszewski , =?UTF-8?Q?Krzysztof_Wilczy=C5=84ski?= , Manivannan Sadhasivam , Catalin Marinas , Will Deacon , quic_vbadigan@quicnic.com, amitk@kernel.org, linux-pci@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-msm@vger.kernel.org, jorge.ramirez@oss.qualcomm.com, linux-arm-kernel@lists.infradead.org, Dmitry Baryshkov , Bartosz Golaszewski References: <20250925143924.GA2160097@bhelgaas> Content-Language: en-US From: Krishna Chaitanya Chundru In-Reply-To: <20250925143924.GA2160097@bhelgaas> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-Proofpoint-GUID: UgYrz4sif-zMIwG_a16hr0lAvPjjdSnQ X-Authority-Analysis: v=2.4 cv=d8n4CBjE c=1 sm=1 tr=0 ts=68d6c2b6 cx=c_pps a=rEQLjTOiSrHUhVqRoksmgQ==:117 a=w+9hNF1SH6wH5mqaHp+xkw==:17 a=IkcTkHD0fZMA:10 a=yJojWOMRYYMA:10 a=qleSEWVE8P8leAEWZfgA:9 a=QEXdDO2ut3YA:10 a=2VI0MkxyNR6bbpdq8BZq:22 X-Proofpoint-ORIG-GUID: UgYrz4sif-zMIwG_a16hr0lAvPjjdSnQ X-Proofpoint-Spam-Details-Enc: AW1haW4tMjUwOTI2MDEwMyBTYWx0ZWRfX+PxSfABAYRzj naQpnVfJ5cg51MrmJJSqNC9U6I6SN5Ql5+shpLYzzyNmsxzL/9mocW48NJTVnPrSJ/YeaO7bBq9 lUKtxIUMhUeTSj+J09xNXH/5K98X4VTRbwsucxlfVUkOxpm7hrzVeYUpIWlMtojDz4TBRMIHLQv RLHLqMydphq7ESuX/B26h8AlnB3QcgOedsy0bYxjiZPNSsoVCtkrMzM9diJUnvWr+2jINiwKggW tAUYuWp9sskUZu7B1m3jFUlf7Jp/Vq0lb6AKLrBXfHGty6MpbKrH12tpkga6ZUzBmHqeG5S/VLZ lDpM3x1QSAII9jEa4P2oi96c+2eHLvVFLPse5kOy8SHuovafPWyLvkLZgGKEuP/cgdFtr5rNIIi KPVdwokVZa3KWq3VAedZdMDrolspfA== X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.293,Aquarius:18.0.1117,Hydra:6.1.9,FMLib:17.12.80.40 definitions=2025-09-26_05,2025-09-26_01,2025-03-28_01 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 suspectscore=0 lowpriorityscore=0 malwarescore=0 spamscore=0 phishscore=0 bulkscore=0 priorityscore=1501 clxscore=1015 adultscore=0 impostorscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0 reason=mlx scancount=1 engine=8.19.0-2509150000 definitions=main-2509260103 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20250926_094335_570940_B33FA655 X-CRM114-Status: GOOD ( 33.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 9/25/2025 8:09 PM, Bjorn Helgaas wrote: > On Thu, Aug 28, 2025 at 05:39:05PM +0530, Krishna Chaitanya Chundru wrote: >> TC9563 is a PCIe switch which has one upstream and three downstream >> ports. To one of the downstream ports integrated ethernet MAC is connected >> as endpoint device. Other two downstream ports are supposed to connect to >> external device. One Host can connect to TC9563 by upstream port. TC9563 >> switch needs to be configured after powering on and before the PCIe link >> was up. >> >> The PCIe controller driver already enables link training at the host side >> even before this driver probe happens, due to this when driver enables >> power to the switch it participates in the link training and PCIe link >> may come up before configuring the switch through i2c. Once the link is >> up the configuration done through i2c will not have any affect.To prevent >> the host from participating in link training, disable link training on the >> host side to ensure the link does not come up before the switch is >> configured via I2C. > > s/any affect/any effect/ > s/.To prevent/. To prevent/ > >> Based up on dt property and type of the port, tc9563 is configured >> through i2c. > > s/up on/on/ > > Pick "i2c" or "I2C" and use it consistently. > >> +config PCI_PWRCTRL_TC9563 >> + tristate "PCI Power Control driver for TC9563 PCIe switch" >> + select PCI_PWRCTRL >> + help >> + Say Y here to enable the PCI Power Control driver of TC9563 PCIe >> + switch. >> + >> + This driver enables power and configures the TC9563 PCIe switch >> + through i2c.TC9563 is a PCIe switch which has one upstream and three >> + downstream ports. To one of the downstream ports integrated ethernet >> + MAC is connected as endpoint device. Other two downstream ports are >> + supposed to connect to external device. > > s/i2c.TC9563/i2c. TC9563/ > >> +static int tc9563_pwrctrl_bring_up(struct tc9563_pwrctrl_ctx *ctx) >> +{ >> + struct tc9563_pwrctrl_cfg *cfg; >> + int ret, i; >> + >> + ret = regulator_bulk_enable(ARRAY_SIZE(ctx->supplies), ctx->supplies); >> + if (ret < 0) >> + return dev_err_probe(ctx->pwrctrl.dev, ret, "cannot enable regulators\n"); >> + >> + gpiod_set_value(ctx->reset_gpio, 0); >> + >> + /* >> + * From TC9563 PORSYS rev 0.2, figure 1.1 POR boot sequence >> + * wait for 10ms for the internal osc frequency to stabilize. >> + */ >> + usleep_range(10000, 10500); > > Possible place for fsleep() unless you have a specific reason for the > +500us interval? > >> +static int tc9563_pwrctrl_probe(struct platform_device *pdev) >> +{ >> + struct pci_host_bridge *bridge = to_pci_host_bridge(pdev->dev.parent); >> + struct pci_dev *pci_dev = to_pci_dev(pdev->dev.parent); >> + struct pci_bus *bus = bridge->bus; >> + struct device *dev = &pdev->dev; >> + enum tc9563_pwrctrl_ports port; >> + struct tc9563_pwrctrl_ctx *ctx; >> + struct device_node *i2c_node; >> + int ret, addr; >> + >> + ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL); >> + if (!ctx) >> + return -ENOMEM; >> + >> + ret = of_property_read_u32_index(pdev->dev.of_node, "i2c-parent", 1, &addr); >> + if (ret) >> + return dev_err_probe(dev, ret, "Failed to read i2c-parent property\n"); >> + >> + i2c_node = of_parse_phandle(dev->of_node, "i2c-parent", 0); >> + ctx->adapter = of_find_i2c_adapter_by_node(i2c_node); >> + of_node_put(i2c_node); >> + if (!ctx->adapter) >> + return dev_err_probe(dev, -EPROBE_DEFER, "Failed to find I2C adapter\n"); >> + >> + ctx->client = i2c_new_dummy_device(ctx->adapter, addr); >> + if (IS_ERR(ctx->client)) { >> + dev_err(dev, "Failed to create I2C client\n"); >> + i2c_put_adapter(ctx->adapter); >> + return PTR_ERR(ctx->client); >> + } >> + >> + for (int i = 0; i < TC9563_PWRCTL_MAX_SUPPLY; i++) >> + ctx->supplies[i].supply = tc9563_supply_names[i]; >> + >> + ret = devm_regulator_bulk_get(dev, TC9563_PWRCTL_MAX_SUPPLY, ctx->supplies); >> + if (ret) { >> + dev_err_probe(dev, ret, >> + "failed to get supply regulator\n"); >> + goto remove_i2c; >> + } >> + >> + ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH); >> + if (IS_ERR(ctx->reset_gpio)) { >> + ret = dev_err_probe(dev, PTR_ERR(ctx->reset_gpio), "failed to get reset GPIO\n"); >> + goto remove_i2c; >> + } >> + >> + pci_pwrctrl_init(&ctx->pwrctrl, dev); >> + >> + port = TC9563_USP; >> + ret = tc9563_pwrctrl_parse_device_dt(ctx, pdev->dev.of_node, port); >> + if (ret) { >> + dev_err(dev, "failed to parse device tree properties: %d\n", ret); >> + goto remove_i2c; >> + } >> + >> + /* >> + * Downstream ports are always children of the upstream port. >> + * The first node represents DSP1, the second node represents DSP2, and so on. >> + */ >> + for_each_child_of_node_scoped(pdev->dev.of_node, child) { >> + ret = tc9563_pwrctrl_parse_device_dt(ctx, child, port++); >> + if (ret) >> + break; >> + /* Embedded ethernet device are under DSP3 */ >> + if (port == TC9563_DSP3) >> + for_each_child_of_node_scoped(child, child1) { >> + ret = tc9563_pwrctrl_parse_device_dt(ctx, child1, port++); >> + if (ret) >> + break; >> + } >> + } >> + if (ret) { >> + dev_err(dev, "failed to parse device tree properties: %d\n", ret); >> + goto remove_i2c; >> + } >> + >> + if (!pcie_link_is_active(pci_dev) && bridge->ops->stop_link) >> + bridge->ops->stop_link(bus); > > Is this pcie_link_is_active() test backwards? Seems like you would > want to stop the link if it *is* active. > you are right pci_dev extracted seems wrong and not pointing to root port dev, and returning always zero. It is pointing to pci_dev in host bridge which doesn't point root port. Thanks for pointing this. I will fix it in next version. > pcie_link_is_active() is racy, and this looks like a situation where > that could be an issue. Would something break if you omitted the test > and *always* stopped and started the link here? if we stop the link if the pcie link is active then we might see AER's & linkdown. - Krishna Chaitanya. > >> + ret = tc9563_pwrctrl_bring_up(ctx); >> + if (ret) >> + goto remove_i2c; >> + >> + if (!pcie_link_is_active(pci_dev) && bridge->ops->start_link) { >> + ret = bridge->ops->start_link(bus); >> + if (ret) >> + goto power_off; >> + } >> + >> + ret = devm_pci_pwrctrl_device_set_ready(dev, &ctx->pwrctrl); >> + if (ret) >> + goto power_off; >> + >> + platform_set_drvdata(pdev, ctx); >> + >> + return 0; >> + >> +power_off: >> + tc9563_pwrctrl_power_off(ctx); >> +remove_i2c: >> + i2c_unregister_device(ctx->client); >> + i2c_put_adapter(ctx->adapter); >> + return ret; >> +}