From: Trilok Soni <quic_tsoni@quicinc.com>
To: Douglas Anderson <dianders@chromium.org>,
Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
Mark Rutland <mark.rutland@arm.com>
Cc: Roxana Bradescu <roxabee@google.com>,
Julius Werner <jwerner@chromium.org>,
<bjorn.andersson@oss.qualcomm.com>,
<linux-arm-msm@vger.kernel.org>,
Florian Fainelli <florian.fainelli@broadcom.com>,
<linux-arm-kernel@lists.infradead.org>,
Jeffrey Hugo <quic_jhugo@quicinc.com>,
Scott Bauer <sbauer@quicinc.com>, <stable@vger.kernel.org>,
James Morse <james.morse@arm.com>, <linux-kernel@vger.kernel.org>
Subject: Re: [PATCH v4 1/5] arm64: errata: Add QCOM_KRYO_4XX_GOLD to the spectre_bhb_k24_list
Date: Fri, 7 Feb 2025 14:56:50 -0800 [thread overview]
Message-ID: <7cfdab48-a044-46f7-8700-46e3595d8690@quicinc.com> (raw)
In-Reply-To: <20250107120555.v4.1.Ie4ef54abe02e7eb0eee50f830575719bf23bda48@changeid>
On 1/7/2025 12:05 PM, Douglas Anderson wrote:
> Qualcomm Kryo 400-series Gold cores have a derivative of an ARM Cortex
> A76 in them. Since A76 needs Spectre mitigation via looping then the
> Kyro 400-series Gold cores also need Spectre mitigation via looping.
>
> Qualcomm has confirmed that the proper "k" value for Kryo 400-series
> Gold cores is 24.
>
> Fixes: 558c303c9734 ("arm64: Mitigate spectre style branch history side channels")
> Cc: stable@vger.kernel.org
> Cc: Scott Bauer <sbauer@quicinc.com>
> Signed-off-by: Douglas Anderson <dianders@chromium.org>
> ---
>
> Changes in v4:
> - Re-added QCOM_KRYO_4XX_GOLD k24 patch after Qualcomm confirmed.
>
> Changes in v3:
> - Removed QCOM_KRYO_4XX_GOLD k24 patch.
>
> Changes in v2:
> - Slight change to wording and notes of KRYO_4XX_GOLD patch
>
> arch/arm64/kernel/proton-pack.c | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/arch/arm64/kernel/proton-pack.c b/arch/arm64/kernel/proton-pack.c
> index da53722f95d4..e149efadff20 100644
> --- a/arch/arm64/kernel/proton-pack.c
> +++ b/arch/arm64/kernel/proton-pack.c
> @@ -866,6 +866,7 @@ u8 spectre_bhb_loop_affected(int scope)
> MIDR_ALL_VERSIONS(MIDR_CORTEX_A76),
> MIDR_ALL_VERSIONS(MIDR_CORTEX_A77),
> MIDR_ALL_VERSIONS(MIDR_NEOVERSE_N1),
> + MIDR_ALL_VERSIONS(MIDR_QCOM_KRYO_4XX_GOLD),
> {},
> };
> static const struct midr_range spectre_bhb_k11_list[] = {
LGTM. Sorry for the delay.
Acked-by: Trilok Soni <quic_tsoni@quicinc.com>
--
---Trilok Soni
next prev parent reply other threads:[~2025-02-07 22:58 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-07 20:05 [PATCH v4 0/5] arm64: errata: Rework Spectre BHB mitigations to not assume "safe" Douglas Anderson
2025-01-07 20:05 ` [PATCH v4 1/5] arm64: errata: Add QCOM_KRYO_4XX_GOLD to the spectre_bhb_k24_list Douglas Anderson
2025-02-07 22:56 ` Trilok Soni [this message]
2025-01-07 20:05 ` [PATCH v4 2/5] arm64: errata: Assume that unknown CPUs _are_ vulnerable to Spectre BHB Douglas Anderson
2025-01-29 16:43 ` James Morse
2025-01-29 19:14 ` Doug Anderson
2025-02-12 17:52 ` Catalin Marinas
2025-02-12 18:05 ` Doug Anderson
2025-01-07 20:06 ` [PATCH v4 3/5] arm64: errata: Add KRYO 2XX/3XX/4XX silver cores to Spectre BHB safe list Douglas Anderson
2025-02-07 22:57 ` Trilok Soni
2025-01-07 20:06 ` [PATCH v4 4/5] arm64: cputype: Add MIDR_CORTEX_A76AE Douglas Anderson
2025-01-07 20:06 ` [PATCH v4 5/5] arm64: errata: Add newer ARM cores to the spectre_bhb_loop_affected() lists Douglas Anderson
2025-01-29 16:43 ` James Morse
2025-03-14 18:42 ` [PATCH v4 0/5] arm64: errata: Rework Spectre BHB mitigations to not assume "safe" Catalin Marinas
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