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mail2.ecloud.global; auth=pass smtp.mailfrom=maud_spierings@murena.io Message-ID: <7d41064a-1f7f-4461-a4ea-513d6afce267@murena.io> Date: Thu, 1 Oct 2026 17:38:30 +0200 MIME-Version: 1.0 Subject: Re: [PATCH v5 13/21] drm/bridge: inno-hdmi: Make the register clock source selectable To: Michal Wilczynski , Vinod Koul , Manivannan Sadhasivam , Neil Armstrong , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Andrzej Hajda , Robert Foss , Laurent Pinchart , Jonas Karlman , Jernej Skrabec , Luca Ceresoli , Maarten Lankhorst , Maxime Ripard , Thomas Zimmermann , Andy Yan , Philipp Zabel , Emil Renner Berthing , Hal Feng , Michael Turquette , Stephen Boyd , Heiko Stuebner , Paul Walmsley , Palmer Dabbelt , Albert Ou , Alexandre Ghiti , Dominique Belhachemi , Brian Masney , Jerome Brunet Cc: linux-phy@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, linux-clk@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-rockchip@lists.infradead.org, linux-riscv@lists.infradead.org, Marek Szyprowski , Graham Markall , Icenowy Zheng , Chaoyi Chen , Joshua Peisach , =?UTF-8?Q?Uwe_Kleine-K=C3=B6nig?= References: <20260929-jh7110-clean-send-v5-0-82b4d8e3c6c7@samsung.com> <20260929-jh7110-clean-send-v5-13-82b4d8e3c6c7@samsung.com> Content-Language: en-US From: Maud Spierings In-Reply-To: <20260929-jh7110-clean-send-v5-13-82b4d8e3c6c7@samsung.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.9.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20261001_083843_170396_061A5F74 X-CRM114-Status: GOOD ( 21.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Michal, Can confirm that this is fixed now! Thanks for integrating this! Tested-by: Maud Spierings Kind regards, Maud On 9/29/26 12:31, Michal Wilczynski wrote: > inno_hdmi_init_hw() drives the register interface from the system clock > on every platform, by setting v_REG_CLK_SOURCE_SYS unconditionally in > HDMI_SYS_CTRL. > > That is not right everywhere. On the JH7110 a Framework 13 (fml13v01) > panel flickers continuously with the system clock selected and behaves > once the TMDS clock drives the register interface instead. Maud Spierings > found this by diffing HDMI_SYS_CTRL against the StarFive vendor kernel, > which leaves the bit clear. > > Add a plat_data flag for it rather than changing the bit for everyone. > The Rockchip integrations keep the system clock, so this is a no-op for > them; only a platform that asks for it gets the TMDS clock. > > Reported-by: Maud Spierings > Closes: https://lore.kernel.org/all/e780ecb8-918f-4816-99c8-b69b10b25a18@murena.io/ > Signed-off-by: Michal Wilczynski > --- > drivers/gpu/drm/bridge/inno-hdmi.c | 4 +++- > include/drm/bridge/inno_hdmi.h | 2 ++ > 2 files changed, 5 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/bridge/inno-hdmi.c b/drivers/gpu/drm/bridge/inno-hdmi.c > index 56f7d41cdae49ae872599a86799412c421158369..db92013a3b1e7c1b6668e9257523a0ca8d2c23d7 100644 > --- a/drivers/gpu/drm/bridge/inno-hdmi.c > +++ b/drivers/gpu/drm/bridge/inno-hdmi.c > @@ -580,7 +580,9 @@ static void inno_hdmi_init_hw(struct inno_hdmi *hdmi) > usleep_range(100, 150); > > msk = m_REG_CLK_INV | m_REG_CLK_SOURCE | m_POWER | m_INT_POL; > - val = v_REG_CLK_INV | v_REG_CLK_SOURCE_SYS | v_PWR_ON | v_INT_POL_HIGH; > + val = v_REG_CLK_INV | v_PWR_ON | v_INT_POL_HIGH; > + val |= hdmi->plat_data->reg_clk_source_tmds ? v_REG_CLK_SOURCE_TMDS : > + v_REG_CLK_SOURCE_SYS; > hdmi_modb(hdmi, HDMI_SYS_CTRL, msk, val); > > inno_hdmi_standby(hdmi); > diff --git a/include/drm/bridge/inno_hdmi.h b/include/drm/bridge/inno_hdmi.h > index 1e9974401c39e3773bb339eaec0b45ff1dd9c975..620f035eb9846762ff91cd933b30e07eaeeae8ed 100644 > --- a/include/drm/bridge/inno_hdmi.h > +++ b/include/drm/bridge/inno_hdmi.h > @@ -32,6 +32,8 @@ struct inno_hdmi_plat_data { > const struct inno_hdmi_plat_ops *ops; > struct inno_hdmi_phy_config *phy_configs; > struct inno_hdmi_phy_config *default_phy_config; > + /* Clock the register interface from the TMDS clock, not the system clock. */ > + bool reg_clk_source_tmds; > }; > > struct inno_hdmi *inno_hdmi_bind(struct device *pdev, >