From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 93DBBCCF9F0 for ; Thu, 30 Oct 2025 21:27:02 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:MIME-Version: Content-Transfer-Encoding:Content-Type:References:In-Reply-To:Date:Cc:To:From :Subject:Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=ixRLpty5QKDOE0ulxvqD55Wb9bzwJbHlOe5KFSOLS1E=; b=qm6NCVea1F9tqLa8hg+gPMVPEV 5D6PVEmWghjgzo+tq7IOUBKAiWRRozmC25l6K+pk0lYoydjon/w+C5I2lxO/M1aSBAYVLm9LK5OwL 2wWFrUQ2NlQp8+V73HEscFX/0Kj9ufYjwSh7Mbp2KrYobtOvBlNLDAVfoKB2omApXepOxY6SWBydg n7/LDg52TBINHsyWFw/sTjlxRS0X0UIxu3B3GycI+ByNSoAAgfCrq1gFn8YZD2oJpACO0kRL45gH0 v3AW17FOs/aRKK7UrUg+Y4OXCTGKUGlJgohFRTFXT0uutFC+N05Jrrzd0hNvdrZBPFl8T4alV04U0 IGKzliVg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vEaAP-00000004t5R-2U1F; Thu, 30 Oct 2025 21:26:49 +0000 Received: from sender4-op-o15.zoho.com ([136.143.188.15]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vEaAA-00000004t4e-391E; Thu, 30 Oct 2025 21:26:42 +0000 ARC-Seal: i=1; a=rsa-sha256; t=1761859574; cv=none; d=zohomail.com; s=zohoarc; b=AMHNToO9uyH2UOzZxFbb68jVb8fRSxPJkx2uGcVBs/9gdG16OTxWSqbRDtjo45Z/FlXyS/FV+J25HRLJ6eE0mwzhoQpGPt8aSSAi4kt0fH/jZQCCxK7BQgcUefeohbYXnHcKtgTmArbRM/+KYIPB10Vi91lWfVPR0oE7a0Tgd88= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1761859574; h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To; bh=ixRLpty5QKDOE0ulxvqD55Wb9bzwJbHlOe5KFSOLS1E=; b=C87w96dCEC6ElqmbmEvGOSTnDEU0vYB9JwkPlW+pp3+V/xALKyuPcmjyx712KT7yM4Yys2ExWU7CSClHlyTQ3hojI79O+7j1ufpxDUUgtjl8GcQp9VlndlyKTulH4INak4h+0reqYs9iVQrstaEVzyH089qEufBmTQ5g+eC7R0w= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass header.i=collabora.com; spf=pass smtp.mailfrom=sjoerd@collabora.com; dmarc=pass header.from= DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1761859574; s=zohomail; d=collabora.com; i=sjoerd@collabora.com; h=Message-ID:Subject:Subject:From:From:To:To:Cc:Cc:Date:Date:In-Reply-To:References:Content-Type:Content-Transfer-Encoding:MIME-Version:Message-Id:Reply-To; bh=ixRLpty5QKDOE0ulxvqD55Wb9bzwJbHlOe5KFSOLS1E=; b=g3yElmKq8LU2i4TbafpRnAEbkB1BmNCRln05g6k8WHT1ZVYQGKWV23fb3FJSpnWi 9Hx5p5E79qn3bFI5Npy3N0kbsz9U6rX3ggbLg03vvs5D9YK8cdErhhhtfzjfFgkdU8r 9MNcrZ/v/23ECwSTe6xbuIllyt+ePSWN22sOQvNU= Received: by mx.zohomail.com with SMTPS id 1761859569654684.60417196483; Thu, 30 Oct 2025 14:26:09 -0700 (PDT) Message-ID: <7d7595a0a33b4e56828beea86f6037bd9ecc8f8d.camel@collabora.com> Subject: Re: [PATCH 11/15] arm64: dts: mediatek: mt7981b-openwrt-one: Enable SPI NOR From: Sjoerd Simons To: AngeloGioacchino Del Regno , Rob Herring , Krzysztof Kozlowski , Conor Dooley , Matthias Brugger , Ryder Lee , Jianjun Wang , Bjorn Helgaas , Lorenzo Pieralisi , Krzysztof =?UTF-8?Q?Wilczy=C5=84ski?= , Manivannan Sadhasivam , Chunfeng Yun , Vinod Koul , Kishon Vijay Abraham I , Lee Jones , Andrew Lunn , "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Lorenzo Bianconi , Felix Fietkau Cc: kernel@collabora.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org, linux-pci@vger.kernel.org, linux-phy@lists.infradead.org, netdev@vger.kernel.org, Daniel Golle , Bryan Hinton Date: Thu, 30 Oct 2025 22:26:00 +0100 In-Reply-To: References: <20251016-openwrt-one-network-v1-0-de259719b6f2@collabora.com> <20251016-openwrt-one-network-v1-11-de259719b6f2@collabora.com> Content-Type: text/plain; charset="UTF-8" Content-Transfer-Encoding: quoted-printable User-Agent: Evolution 3.56.2-5 MIME-Version: 1.0 X-ZohoMailClient: External X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251030_142630_869597_EDF1A16E X-CRM114-Status: GOOD ( 19.91 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 2025-10-16 at 13:28 +0200, AngeloGioacchino Del Regno wrote: > Il 16/10/25 12:08, Sjoerd Simons ha scritto: > > The openwrt one has a SPI NOR flash which from factory is used for: > > * Recovery system > > * WiFi eeprom data > > * ethernet Mac addresses > >=20 > > Describe this following the same partitions as the openwrt configuratio= n > > uses. > >=20 > > Signed-off-by: Sjoerd Simons > > --- > > =C2=A0 .../boot/dts/mediatek/mt7981b-openwrt-one.dts=C2=A0=C2=A0=C2=A0= =C2=A0=C2=A0 | 83 ++++++++++++++++++++++ > > =C2=A0 1 file changed, 83 insertions(+) > >=20 > > diff --git a/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts > > b/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts > > index b6ca628ee72fd..9878009385cc6 100644 > > --- a/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts > > +++ b/arch/arm64/boot/dts/mediatek/mt7981b-openwrt-one.dts > > @@ -3,6 +3,7 @@ > > =C2=A0 /dts-v1/; > > =C2=A0=20 > > =C2=A0 #include "mt7981b.dtsi" > > +#include "dt-bindings/pinctrl/mt65xx.h" > > =C2=A0=20 > > =C2=A0 / { > > =C2=A0=C2=A0 compatible =3D "openwrt,one", "mediatek,mt7981b"; > > @@ -54,6 +55,25 @@ mux { > > =C2=A0=C2=A0 }; > > =C2=A0=C2=A0 }; > > =C2=A0=20 > > + spi2_flash_pins: spi2-pins { > > + mux { > > + function =3D "spi"; > > + groups =3D "spi2"; > > + }; > > + > > + conf-pu { > > + bias-pull-up =3D ; > > + drive-strength =3D ; >=20 > drive-strength =3D <8>; >=20 > > + pins =3D "SPI2_CS", "SPI2_WP"; > > + }; > > + > > + conf-pd { > > + bias-pull-down =3D ; > > + drive-strength =3D ; >=20 > ditto >=20 > > + pins =3D "SPI2_CLK", "SPI2_MOSI", "SPI2_MISO"; > > + }; > > + }; > > + > > =C2=A0=C2=A0 uart0_pins: uart0-pins { > > =C2=A0=C2=A0 mux { > > =C2=A0=C2=A0 function =3D "uart"; > > @@ -62,6 +82,69 @@ mux { > > =C2=A0=C2=A0 }; > > =C2=A0 }; > > =C2=A0=20 > > +&spi2 { > > + pinctrl-names =3D "default"; > > + pinctrl-0 =3D <&spi2_flash_pins>; > > + status =3D "okay"; > > + > > + flash@0 { > > + compatible =3D "jedec,spi-nor"; > > + reg =3D <0>; > > + spi-max-frequency =3D <40000000>; > > + #address-cells =3D <1>; > > + #size-cells =3D <1>; > > + > > + partitions { > > + compatible =3D "fixed-partitions"; > > + #address-cells =3D <1>; > > + #size-cells =3D <1>; > > + > > + partition@0 { > > + reg =3D <0x00000 0x40000>; > > + label =3D "bl2-nor"; > > + }; > > + > > + partition@40000 { > > + reg =3D <0x40000 0xc0000>; > > + label =3D "factory"; > > + read-only; > > + > > + nvmem-layout { > > + compatible =3D "fixed-layout"; > > + #address-cells =3D <1>; > > + #size-cells =3D <1>; > > + > > + eeprom_factory_0: eeprom@0 { >=20 > wifi_calibration: >=20 > > + reg =3D <0x0 0x1000>; > > + }; > > + > > + macaddr_factory_4: macaddr@4 { >=20 > macaddr_factory_gmac1? >=20 > You're not using this in the later commit where you enable ethernet nodes= , > did you miss adding that to gmac1 or what is this used for? gmac1 gets its mac from u-boot, passed in through device-tree; Haven't chec= ked where u-boot gets it from yet. I did spot it at offset 0x2a in this factory data, so that seems = likely candidate. However this particular mac is used by the wifi phy. I discovered after sen= ding this patch the kernel driver loads it directly from the "eeprom" area, so we could potentially dr= op this node.=20 As mentioned in the commit message, I kept the same layouts as openwrt uses= . Though i'd be fine to minimize the nvmem cells just to what's referenced in the dtb. > > + reg =3D <0x4 0x6>; > > + compatible =3D "mac-base"; > > + #nvmem-cell-cells =3D <1>; > > + }; > > + > > + macaddr_factory_24: macaddr@24 { >=20 > macaddr_factory_gmac0 ? That seems nicer, will add that in V2 (same for the previous naming suggest= ion) --=20 Sjoerd Simons Collabora Ltd.