From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 24F6AC64ED8 for ; Fri, 24 Feb 2023 11:10:40 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=V86bYCLUvjK+nTWhOsRJf5X4iopJn733cbyUNyHJjmU=; b=2GaH4D6xkxZsXQ 50wW3RyHh006VVnFG4rae7IzT+GsrRizps+rUsLthyxKZIcQQbV0AprGtOFFmZ5AE0rgG5rHXYsZn 2/RlgEjljbE41wJBbX+X+G0YfoB5JHiPZtZKjzSZiBpYqSH/sX/zLDNHFHPnkxODJJLOnbaSETNRh iVmtJwyzfZMuw6/SL4DnfEo4X6d324/O2gbWpbLNcZUSuTwdmHfahD/2+4CN4AjjAY8Ip0pzlNHmh 9Go3wkZisKN5yWOJlbjW7U6F5XeQDcGSsyjIJh0wL6QGDkFuoUDLfQDdnLxdgGy+5N+edAmTuXjye WjICybgye/jSW1v5u9KA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVVxT-002CFW-NC; Fri, 24 Feb 2023 11:09:47 +0000 Received: from mail-wm1-x32d.google.com ([2a00:1450:4864:20::32d]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1pVVxP-002CC5-IQ for linux-arm-kernel@lists.infradead.org; Fri, 24 Feb 2023 11:09:45 +0000 Received: by mail-wm1-x32d.google.com with SMTP id iv11-20020a05600c548b00b003dc52fed235so1498750wmb.1 for ; Fri, 24 Feb 2023 03:09:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :from:to:cc:subject:date:message-id:reply-to; bh=NZLgGbzYMjAzej3DGyr9UAP/ybR/0Ek6icgQ+DcCBHc=; b=Iu9e0+yoOMJyPP1DwYpXIIP9s6Bi+zJHDMccwayOxQ/Vw5TS74+FN8LBeHZazsyzNS /f3fJ3+a1u7yiB7pl7SFYrwLZgIVNEnPQn6v1Dzi8vq85D7ao539SfcEhCTWDHraKlWp KktVa9GGnEk1nJdMBtToh1RVJI6dQgS+vBu/CcTIgZi0s7e7X0D+spZ2dfQoCnfX/O4N 4+TtCv5Vl4UPHWCODVEuvmiBBF7JEZlUFvuxhUJHFCqORRtyfV5ucfjPWxqVFbYYY2SW fNGllGHbQCG7Z71iDdS7szZSlngAHBmAsCGJvIGICc77+K+4ZciGQPOb2okZknqZvQ/l Z1WQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20210112; h=content-transfer-encoding:in-reply-to:from:references:cc:to :content-language:subject:user-agent:mime-version:date:message-id :x-gm-message-state:from:to:cc:subject:date:message-id:reply-to; bh=NZLgGbzYMjAzej3DGyr9UAP/ybR/0Ek6icgQ+DcCBHc=; b=x3kYG7oiMoA9wYApk96WJgMpyLyNHPn53lcNhylwskHrUY7CIJHf4C8y+F5OiL5ACi fhiQo4jG8XkIGAOECZlYzZkKt8nV3wSPv1XBSlDyjSpB+cZM8SzG2dCAOBzO6N0TTQ66 G/6W6Imwf4EoaLHkmV1UuK2HN5FnFTYEA55vT7ZTqUrFP8+o8l4bsSVdUkoYUZZDilxu OuFI4RPipRT9qrtNptshNeijELoY6kQuXuLyN75ehhpB4UeaY+iNZfZHcH2UEdaqAXDR ol+MZw/gQd2eutTcM+e9DZ7XNLJKA/VMyUVtB4l2py9ofzLv/ZrPfALhcfOoD1i3N3Ct 4FtQ== X-Gm-Message-State: AO0yUKV5IAJ7BcbWxKdCh3CLg5/nWIZRs/Zt4eqSvzClfgbrDHHBXnkb /ucy13yNYrpJbGCDrmTGRrV5kA== X-Google-Smtp-Source: AK7set+QsSPhmANXMAmCwprRZOYWjaSTm3y6grWcXfx2bgZgbD0wCNjkRxCF6ITQZdC0GZCugESXCQ== X-Received: by 2002:a05:600c:30ca:b0:3df:12ac:7cc9 with SMTP id h10-20020a05600c30ca00b003df12ac7cc9mr5480813wmn.15.1677236981130; Fri, 24 Feb 2023 03:09:41 -0800 (PST) Received: from [192.168.1.20] ([178.197.216.144]) by smtp.gmail.com with ESMTPSA id jb17-20020a05600c54f100b003e200d3b2d1sm2425610wmb.38.2023.02.24.03.09.39 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Fri, 24 Feb 2023 03:09:40 -0800 (PST) Message-ID: <7e236ecc-1cb4-b53b-fb68-c23aa45c4cd2@linaro.org> Date: Fri, 24 Feb 2023 12:09:39 +0100 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.8.0 Subject: Re: [PATCH v11 3/8] arm64: dts: ti: k3-j721s2-mcu-wakeup: Add support of OSPI Content-Language: en-US To: Ravi Gunasekaran , nm@ti.com, afd@ti.com, vigneshr@ti.com, kristo@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, s-vadapalli@ti.com, vaishnav.a@ti.com Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org References: <20230224102438.6541-1-r-gunasekaran@ti.com> <20230224102438.6541-4-r-gunasekaran@ti.com> From: Krzysztof Kozlowski In-Reply-To: <20230224102438.6541-4-r-gunasekaran@ti.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230224_030943_656180_FA37DA85 X-CRM114-Status: GOOD ( 21.19 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 24/02/2023 11:24, Ravi Gunasekaran wrote: > From: Aswath Govindraju > > Add support for two instance of OSPI in J721S2 SoC. > > Reviewed-by: Vaishnav Achath > Signed-off-by: Aswath Govindraju > Signed-off-by: Matt Ranostay > Signed-off-by: Ravi Gunasekaran > --- > Changes from v10: > * Documented the reason for disabling the nodes by default. > * Removed Link tag from commmit message > > Changes from v9: > * Disabled fss, ospi nodes by default in common DT file > > Changes from v8: > * Updated "ranges" property to fix dtbs warnings > > Changes from v7: > * Removed "reg" property from syscon node > * Renamed the "syscon" node to "bus" to after change in > compatible property > > Changes from v6: > * Fixed the syscon node's compatible property > > Changes from v5: > * Updated the syscon node's compatible property > * Removed Cc tags from commit message > > Changes from v4: > * No change > > Changes from v3: > * No change > > Changes from v2: > * No change > > Changes from v1: > * No change > > .../boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi | 62 +++++++++++++++++++ > 1 file changed, 62 insertions(+) > > diff --git a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi > index 0af242aa9816..5005a3ebbd34 100644 > --- a/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi > +++ b/arch/arm64/boot/dts/ti/k3-j721s2-mcu-wakeup.dtsi > @@ -306,4 +306,66 @@ > ti,cpts-periodic-outputs = <2>; > }; > }; > + > + fss: bus@47000000 { > + compatible = "simple-bus"; > + #address-cells = <2>; > + #size-cells = <2>; > + ranges = <0x00 0x47000000 0x00 0x47000000 0x00 0x00068400>, > + <0x05 0x00000000 0x05 0x00000000 0x01 0x00000000>, > + <0x07 0x00000000 0x07 0x00000000 0x01 0x00000000>; > + > + /* > + * Disable the node by default in the common include file. > + * And enable it in the board specific DT file where the > + * pinmux property is added. Why? Bus does not need pinmux. > + */ > + status = "disabled"; > + > + ospi0: spi@47040000 { > + compatible = "ti,am654-ospi", "cdns,qspi-nor"; > + reg = <0x00 0x47040000 0x00 0x100>, > + <0x05 0x00000000 0x01 0x00000000>; > + interrupts = ; > + cdns,fifo-depth = <256>; > + cdns,fifo-width = <4>; > + cdns,trigger-address = <0x0>; > + clocks = <&k3_clks 109 5>; > + assigned-clocks = <&k3_clks 109 5>; > + assigned-clock-parents = <&k3_clks 109 7>; > + assigned-clock-rates = <166666666>; > + power-domains = <&k3_pds 109 TI_SCI_PD_EXCLUSIVE>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + /* > + * Disable the node by default in the common include > + * file. And enable it in the board specific DT file > + * where the pinmux property is added. Isn't this comment obvious? It's what we do everywhere on every platform every SoC? > + */ > + status = "disabled"; > + }; > + > + ospi1: spi@47050000 { > + compatible = "ti,am654-ospi", "cdns,qspi-nor"; > + reg = <0x00 0x47050000 0x00 0x100>, > + <0x07 0x00000000 0x01 0x00000000>; > + interrupts = ; > + cdns,fifo-depth = <256>; > + cdns,fifo-width = <4>; > + cdns,trigger-address = <0x0>; > + clocks = <&k3_clks 110 5>; > + power-domains = <&k3_pds 110 TI_SCI_PD_EXCLUSIVE>; > + #address-cells = <1>; > + #size-cells = <0>; > + > + /* > + * Disable the node by default in the common include > + * file. And enable it in the board specific DT file > + * where the pinmux property is added. > + */ > + status = "disabled"; > + }; > + No need for blank line. > + }; > }; Best regards, Krzysztof _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel