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Fri, 14 Oct 2022 14:52:26 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id BB0D7100034; Fri, 14 Oct 2022 14:52:21 +0200 (CEST) Received: from Webmail-eu.st.com (shfdag1node2.st.com [10.75.129.70]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id B3C35229A9A; Fri, 14 Oct 2022 14:52:21 +0200 (CEST) Received: from [10.252.6.249] (10.75.127.49) by SHFDAG1NODE2.st.com (10.75.129.70) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.1.2375.31; Fri, 14 Oct 2022 14:52:19 +0200 Message-ID: <7e53cfe8-1c85-1ad4-04be-b555cfb26a9e@foss.st.com> Date: Fri, 14 Oct 2022 14:52:18 +0200 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH v4 5/8] ARM: dts: stm32: add adc support to stm32mp13 To: Olivier Moysan , Rob Herring , Alexandre Torgue , Andy Shevchenko , Jonathan Cameron , Lars-Peter Clausen , Maxime Coquelin CC: , , , , References: <20221012142205.13041-1-olivier.moysan@foss.st.com> <20221012142205.13041-6-olivier.moysan@foss.st.com> Content-Language: en-US From: Fabrice Gasnier In-Reply-To: <20221012142205.13041-6-olivier.moysan@foss.st.com> X-Originating-IP: [10.75.127.49] X-ClientProxiedBy: SFHDAG2NODE3.st.com (10.75.127.6) To SHFDAG1NODE2.st.com (10.75.129.70) X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.205,Aquarius:18.0.895,Hydra:6.0.545,FMLib:17.11.122.1 definitions=2022-10-14_07,2022-10-14_01,2022-06-22_01 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221014_055234_021893_BE86DE61 X-CRM114-Status: GOOD ( 20.54 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/12/22 16:22, Olivier Moysan wrote: > Add ADC1 and ADC2 support to STM32MP13 SoC family. > > The STM32MP131 provides only ADC2, while other STM32MP13 SoCs provide > both ADC1 and ADC2. > > Internal channels support limitations: > - VREFINT internal channel requires calibration data from OTP memory. > The nvmem properties used to access OTP are not defined for time being, > as OTP support is not yet enabled. > > - VBAT internal channel is not defined by default in SoC DT, and > has be defined in board DT when needed, instead. This avoids unwanted > current consumption on battery, when ADC conversions are performed > on any other channels. > > Signed-off-by: Olivier Moysan > --- > arch/arm/boot/dts/stm32mp131.dtsi | 43 +++++++++++++++++++++++++++++++ > arch/arm/boot/dts/stm32mp133.dtsi | 31 ++++++++++++++++++++++ > 2 files changed, 74 insertions(+) > > diff --git a/arch/arm/boot/dts/stm32mp131.dtsi b/arch/arm/boot/dts/stm32mp131.dtsi > index dd35a607073d..0b85e7744db5 100644 > --- a/arch/arm/boot/dts/stm32mp131.dtsi > +++ b/arch/arm/boot/dts/stm32mp131.dtsi > @@ -313,6 +313,49 @@ i2c5: i2c@4c006000 { > status = "disabled"; > }; > > + adc_2: adc@48004000 { Hi Olivier, Nodes should be sorted by address here. Maybe Alexandre will take care when applying ? With that fixed, you can add my: Reviewed-by: Fabrice Gasnier Thanks, Fabrice > + compatible = "st,stm32mp13-adc-core"; > + reg = <0x48004000 0x400>; > + interrupts = ; > + clocks = <&rcc ADC2>, <&rcc ADC2_K>; > + clock-names = "bus", "adc"; > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + > + adc2: adc@0 { > + compatible = "st,stm32mp13-adc"; > + #io-channel-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x0>; > + interrupt-parent = <&adc_2>; > + interrupts = <0>; > + dmas = <&dmamux1 10 0x400 0x80000001>; > + dma-names = "rx"; > + status = "disabled"; > + > + channel@13 { > + reg = <13>; > + label = "vrefint"; > + }; > + channel@14 { > + reg = <14>; > + label = "vddcore"; > + }; > + channel@16 { > + reg = <16>; > + label = "vddcpu"; > + }; > + channel@17 { > + reg = <17>; > + label = "vddq_ddr"; > + }; > + }; > + }; > + > rcc: rcc@50000000 { > compatible = "st,stm32mp13-rcc", "syscon"; > reg = <0x50000000 0x1000>; > diff --git a/arch/arm/boot/dts/stm32mp133.dtsi b/arch/arm/boot/dts/stm32mp133.dtsi > index 531c263c9f46..df451c3c2a26 100644 > --- a/arch/arm/boot/dts/stm32mp133.dtsi > +++ b/arch/arm/boot/dts/stm32mp133.dtsi > @@ -33,5 +33,36 @@ m_can2: can@4400f000 { > bosch,mram-cfg = <0x1400 0 0 32 0 0 2 2>; > status = "disabled"; > }; > + > + adc_1: adc@48003000 { > + compatible = "st,stm32mp13-adc-core"; > + reg = <0x48003000 0x400>; > + interrupts = ; > + clocks = <&rcc ADC1>, <&rcc ADC1_K>; > + clock-names = "bus", "adc"; > + interrupt-controller; > + #interrupt-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + status = "disabled"; > + > + adc1: adc@0 { > + compatible = "st,stm32mp13-adc"; > + #io-channel-cells = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x0>; > + interrupt-parent = <&adc_1>; > + interrupts = <0>; > + dmas = <&dmamux1 9 0x400 0x80000001>; > + dma-names = "rx"; > + status = "disabled"; > + > + channel@18 { > + reg = <18>; > + label = "vrefint"; > + }; > + }; > + }; > }; > }; _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel