From: Laurentiu Tudor <tudor.laurentiu.oss@gmail.com>
To: Robin Murphy <robin.murphy@arm.com>,
Bjorn Helgaas <helgaas@kernel.org>, Frank Li <Frank.Li@nxp.com>
Cc: "Richard Zhu" <hongxing.zhu@nxp.com>,
"Lucas Stach" <l.stach@pengutronix.de>,
"Lorenzo Pieralisi" <lpieralisi@kernel.org>,
"Krzysztof Wilczyński" <kw@linux.com>,
"Rob Herring" <robh@kernel.org>,
"Bjorn Helgaas" <bhelgaas@google.com>,
"Shawn Guo" <shawnguo@kernel.org>,
"Sascha Hauer" <s.hauer@pengutronix.de>,
"Pengutronix Kernel Team" <kernel@pengutronix.de>,
"Fabio Estevam" <festevam@gmail.com>,
"NXP Linux Team" <linux-imx@nxp.com>,
"Philipp Zabel" <p.zabel@pengutronix.de>,
"Liam Girdwood" <lgirdwood@gmail.com>,
"Mark Brown" <broonie@kernel.org>,
"Manivannan Sadhasivam" <manivannan.sadhasivam@linaro.org>,
"Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>,
"Conor Dooley" <conor+dt@kernel.org>,
linux-pci@vger.kernel.org, imx@lists.linux.dev,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, bpf@vger.kernel.org,
devicetree@vger.kernel.org, "Will Deacon" <will@kernel.org>,
"Joerg Roedel" <joro@8bytes.org>,
"Jason Gunthorpe" <jgg@ziepe.ca>,
"Alyssa Rosenzweig" <alyssa@rosenzweig.io>,
"Marc Zyngier" <maz@kernel.org>
Subject: Re: [PATCH v5 08/12] PCI: imx6: Config look up table(LUT) to support MSI ITS and IOMMU for i.MX95
Date: Mon, 3 Jun 2024 23:29:38 +0300 [thread overview]
Message-ID: <7edbdb11-5135-4f26-be12-c86f4dc4c0ff@gmail.com> (raw)
In-Reply-To: <974f1d23-aba8-432e-85b5-0e4b1c2005e7@arm.com>
On 5/31/24 17:58, Robin Murphy wrote:
> On 2024-05-31 12:08 am, Bjorn Helgaas wrote:
>> [+cc IOMMU and pcie-apple.c folks for comment]
>>
>> On Tue, May 28, 2024 at 03:39:21PM -0400, Frank Li wrote:
>>> For the i.MX95, configuration of a LUT is necessary to convert Bus
>>> Device
>>> Function (BDF) to stream IDs, which are utilized by both IOMMU and ITS.
>>> This involves examining the msi-map and smmu-map to ensure consistent
>>> mapping of PCI BDF to the same stream IDs. Subsequently, LUT-related
>>> registers are configured. In the absence of an msi-map, the built-in MSI
>>> controller is utilized as a fallback.
>>>
>>> Additionally, register a PCI bus notifier to trigger
>>> imx_pcie_add_device()
>>> upon the appearance of a new PCI device and when the bus is an iMX6 PCI
>>> controller. This function configures the correct LUT based on Device
>>> Tree
>>> Settings (DTS).
>>
>> This scheme is pretty similar to apple_pcie_bus_notifier(). If we
>> have to do this, I wish it were *more* similar, i.e., copy the
>> function names, bitmap tracking, code structure, etc.
>>
>> I don't really know how stream IDs work, but I assume they are used on
>> most or all arm64 platforms, so I'm a little surprised that of all the
>> PCI host drivers used on arm64, only pcie-apple.c and pci-imx6.c need
>> this notifier.
>
> This is one of those things that's mostly at the mercy of the PCIe root
> complex implementation. Typically the SMMU StreamID and/or GIC ITS
> DeviceID is derived directly from the PCI RID, sometimes with additional
> high-order bits hard-wired to disambiguate PCI segments. I believe this
> RID-translation LUT is a particular feature of the the Synopsys IP - I
> know there's also one on the NXP Layerscape platforms, but on those it's
> programmed by the bootloader, which also generates the appropriate
> "msi-map" and "iommu-map" properties to match. Ideally that's what i.MX
> should do as well, but hey.
That's usually fine, except when SRIOV and/or hotplug devices (that is,
not discoverable at bootloader time) come into play. We came up with
this "solution" to cover these more dynamic scenarios.
https://source.denx.de/u-boot/u-boot/-/commit/2a5bbb13cc39102a68fcc31056925427ab44b591
---
Best Regards, Laurentiu
>> There's this path, which is pretty generic and does at least the
>> of_map_id() part of what you're doing in imx_pcie_add_device():
>>
>> __driver_probe_device
>> really_probe
>> pci_dma_configure #
>> pci_bus_type.dma_configure
>> of_dma_configure
>> of_dma_configure_id
>> of_iommu_configure
>> of_pci_iommu_init
>> of_iommu_configure_dev_id
>> of_map_id
>> of_iommu_xlate
>> ops = iommu_ops_from_fwnode
>> iommu_fwspec_init
>> ops->of_xlate(dev, iommu_spec)
>>
>> Maybe this needs to be extended somehow with a hook to do the
>> device-specific work like updating the LUT? Just speculating here,
>> the IOMMU folks will know how this is expected to work.
>
> Note that that particular code path has fundamental issues and much of
> it needs to go away (I'm working on it, but it's a rich ~8-year-old pile
> of technical debt...). IOMMU configuration needs to be happening at
> device_add() time via the IOMMU layer's own bus notifier.
>
> If it's really necessary to do this programming from Linux, then there's
> still no point in it being dynamic - the mappings cannot ever change,
> since the rest of the kernel believes that what the DT said at boot time
> was already a property of the hardware. It would be a lot more logical,
> and likely simpler, for the driver to just read the relevant map
> property and program the entire LUT to match, all in one go at
> controller probe time. Rather like what's already commonly done with the
> parsing of "dma-ranges" to program address-translation LUTs for inbound
> windows.
>
> Plus that would also give a chance of safely dealing with bad DTs
> specifying invalid ID mappings (by refusing to probe at all). As it is,
> returning an error from a child's BUS_NOTIFY_ADD_DEVICE does nothing
> except prevent any further notifiers from running at that point - the
> device will still be added, allowed to bind a driver, and able to start
> sending DMA/MSI traffic without the controller being correctly
> programmed, which at best won't work and at worst may break the whole
> system.
>
> Thanks,
> Robin.
>
> _______________________________________________
> linux-arm-kernel mailing list
> linux-arm-kernel@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
_______________________________________________
linux-arm-kernel mailing list
linux-arm-kernel@lists.infradead.org
http://lists.infradead.org/mailman/listinfo/linux-arm-kernel
next prev parent reply other threads:[~2024-06-03 20:30 UTC|newest]
Thread overview: 44+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-05-28 19:39 [PATCH v5 00/12] PCI: imx6: Fix\rename\clean up and add lut information for imx95 Frank Li
2024-05-28 19:39 ` [PATCH v5 01/12] PCI: imx6: Fix establish link failure in EP mode for iMX8MM and iMX8MP Frank Li
2024-05-28 19:39 ` [PATCH v5 02/12] PCI: imx6: Fix i.MX8MP PCIe EP's occasional failure to trigger MSI Frank Li
2024-05-28 19:39 ` [PATCH v5 03/12] PCI: imx6: Rename imx6_* with imx_* Frank Li
2024-05-28 19:39 ` [PATCH v5 04/12] PCI: imx6: Introduce SoC specific callbacks for controlling REFCLK Frank Li
2024-05-28 19:39 ` [PATCH v5 05/12] PCI: imx6: Simplify switch-case logic by involve core_reset callback Frank Li
2024-05-28 19:39 ` [PATCH v5 06/12] PCI: imx6: Improve comment for workaround ERR010728 Frank Li
2024-05-28 19:39 ` [PATCH v5 07/12] PCI: imx6: Add help function imx_pcie_match_device() Frank Li
2024-05-28 19:39 ` [PATCH v5 08/12] PCI: imx6: Config look up table(LUT) to support MSI ITS and IOMMU for i.MX95 Frank Li
2024-05-30 23:08 ` Bjorn Helgaas
2024-05-31 13:52 ` Marc Zyngier
2024-05-31 14:58 ` Robin Murphy
2024-05-31 16:25 ` Frank Li
2024-06-03 17:19 ` Bjorn Helgaas
2024-06-03 18:42 ` Frank Li
2024-06-03 18:56 ` Bjorn Helgaas
2024-06-03 20:07 ` Frank Li
2024-06-06 20:24 ` Frank Li
2024-06-13 22:41 ` Bjorn Helgaas
2024-06-17 14:26 ` Frank Li
2024-06-21 22:29 ` Frank Li
2024-06-21 22:43 ` Bjorn Helgaas
2024-06-22 17:38 ` Bjorn Helgaas
2024-06-24 15:00 ` Frank Li
2024-06-03 20:20 ` Robin Murphy
2024-06-03 21:04 ` Frank Li
2024-06-04 15:25 ` Marc Zyngier
2024-06-04 15:47 ` Frank Li
2024-06-03 20:29 ` Laurentiu Tudor [this message]
2024-06-03 21:16 ` Frank Li
2024-05-31 16:14 ` Frank Li
2024-06-03 17:11 ` Bjorn Helgaas
2024-06-03 18:21 ` Frank Li
2024-06-22 4:11 ` Manivannan Sadhasivam
2024-06-24 15:06 ` Frank Li
2024-05-28 19:39 ` [PATCH v5 09/12] PCI: imx6: Consolidate redundant if-checks Frank Li
2024-05-28 19:39 ` [PATCH v5 10/12] dt-bindings: imx6q-pcie: Add i.MX8Q pcie compatible string Frank Li
2024-05-28 19:39 ` [PATCH v5 11/12] PCI: imx6: Call: Common PHY API to set mode, speed, and submode Frank Li
2024-05-28 19:39 ` [PATCH v5 12/12] PCI: imx6: Add i.MX8Q PCIe root complex (RC) support Frank Li
2024-05-28 22:31 ` [PATCH v5 00/12] PCI: imx6: Fix\rename\clean up and add lut information for imx95 Bjorn Helgaas
2024-05-29 15:00 ` Frank Li
2024-05-30 17:27 ` Bjorn Helgaas
2024-05-30 17:56 ` Frank Li
2024-06-06 21:24 ` Frank Li
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=7edbdb11-5135-4f26-be12-c86f4dc4c0ff@gmail.com \
--to=tudor.laurentiu.oss@gmail.com \
--cc=Frank.Li@nxp.com \
--cc=alyssa@rosenzweig.io \
--cc=bhelgaas@google.com \
--cc=bpf@vger.kernel.org \
--cc=broonie@kernel.org \
--cc=conor+dt@kernel.org \
--cc=devicetree@vger.kernel.org \
--cc=festevam@gmail.com \
--cc=helgaas@kernel.org \
--cc=hongxing.zhu@nxp.com \
--cc=imx@lists.linux.dev \
--cc=jgg@ziepe.ca \
--cc=joro@8bytes.org \
--cc=kernel@pengutronix.de \
--cc=krzysztof.kozlowski+dt@linaro.org \
--cc=kw@linux.com \
--cc=l.stach@pengutronix.de \
--cc=lgirdwood@gmail.com \
--cc=linux-arm-kernel@lists.infradead.org \
--cc=linux-imx@nxp.com \
--cc=linux-kernel@vger.kernel.org \
--cc=linux-pci@vger.kernel.org \
--cc=lpieralisi@kernel.org \
--cc=manivannan.sadhasivam@linaro.org \
--cc=maz@kernel.org \
--cc=p.zabel@pengutronix.de \
--cc=robh@kernel.org \
--cc=robin.murphy@arm.com \
--cc=s.hauer@pengutronix.de \
--cc=shawnguo@kernel.org \
--cc=will@kernel.org \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).