From: santosh.shilimkar@ti.com (Santosh Shilimkar)
To: linux-arm-kernel@lists.infradead.org
Subject: [PATCH 1/6] omap4: powerdomain: Add supported INACTIVE power state
Date: Thu, 3 Feb 2011 14:30:10 +0530 [thread overview]
Message-ID: <7f9f718bd21a8c81eba2fa3d8b60b700@mail.gmail.com> (raw)
In-Reply-To: <87aaieazyb.fsf@ti.com>
> -----Original Message-----
> From: Kevin Hilman [mailto:khilman at ti.com]
> Sent: Thursday, February 03, 2011 2:58 AM
> To: Rajendra Nayak
> Cc: Santosh Shilimkar; linux-omap at vger.kernel.org; paul at pwsan.com;
> Benoit Cousson; linux-arm-kernel at lists.infradead.org
> Subject: Re: [PATCH 1/6] omap4: powerdomain: Add supported INACTIVE
> power state
>
> Rajendra Nayak <rnayak@ti.com> writes:
>
> > Hi Kevin,
> >
> >> -----Original Message-----
> >> From: Kevin Hilman [mailto:khilman at ti.com]
> >> Sent: Wednesday, February 02, 2011 6:49 AM
> >> To: Santosh Shilimkar
> >> Cc: linux-omap at vger.kernel.org; paul at pwsan.com; b-cousson at ti.com;
> > rnayak at ti.com; linux-arm-
> >> kernel at lists.infradead.org
> >> Subject: Re: [PATCH 1/6] omap4: powerdomain: Add supported
> INACTIVE
> > power state
> >>
> >> Santosh Shilimkar <santosh.shilimkar@ti.com> writes:
> >>
> >> > On OMAP4, one can explicitly program INACTIVE as the power
> state of
> >> > the logic area inside the power domain. Techincally PD state
> > programmed
> >> > to ON and if all the clock domains within the PD are idled, is
> > equivalent
> >> > tp PD programmed to INACTIVE and all the clock domains within
> the PD
> > are
> >> > idled. There won't be any power difference in above two.
> >> >
> >> > Since the CPUIDLE C-states explicitly make use of INACTIVE as a
> PD
> >> > targeted state
> >>
> >> I think you're referring to code that is not upstream here. I'm
> not
> >> aware of any C-states targetting INACTIVE.
> >
> > On OMAP3, C2/3/4 have target state as CORE inactive, while C1 is
> > CORE active.
>
> I see what you're saying now.
>
> However, from a code point of view, all of those C-states are
> programmed
> to PWRDM_POWER_ON.
>
> Therefore the changelog is not accurate. Specifically the use of
> "explicitly" is wrong, because the use of INACTIVE is most certainly
> not explicit.
>
Ok. The 'explicit' came from OMAP4 where you could program it. I agree
the code is not there in mainline to show this.
I can drop the explicit from change log if it helps.
Regards,
Santosh
next prev parent reply other threads:[~2011-02-03 9:00 UTC|newest]
Thread overview: 24+ messages / expand[flat|nested] mbox.gz Atom feed top
2011-01-28 11:04 [PATCH 0/6] omap4: prcm: Few dpll, clockdomain and powerdomain updates Santosh Shilimkar
2011-01-28 11:04 ` [PATCH 1/6] omap4: powerdomain: Add supported INACTIVE power state Santosh Shilimkar
2011-01-31 23:14 ` Paul Walmsley
2011-02-01 6:29 ` Santosh Shilimkar
2011-02-01 12:39 ` Cousson, Benoit
2011-02-02 21:40 ` Paul Walmsley
2011-02-03 8:55 ` Santosh Shilimkar
2011-02-02 1:19 ` Kevin Hilman
2011-02-02 4:19 ` Rajendra Nayak
2011-02-02 21:28 ` Kevin Hilman
2011-02-03 9:00 ` Santosh Shilimkar [this message]
2011-01-28 11:04 ` [PATCH 2/6] omap4: prcm: Fix the CPUx clockdomain offsets Santosh Shilimkar
2011-02-02 1:20 ` Kevin Hilman
2011-02-02 9:24 ` Cousson, Benoit
2011-02-03 12:51 ` Cousson, Benoit
2011-01-28 11:04 ` [PATCH 3/6] omap4: powerdomain: Use intended PWRSTS_* flags instead of values Santosh Shilimkar
2011-02-02 1:21 ` Kevin Hilman
2011-02-02 6:15 ` Santosh Shilimkar
2011-01-28 11:04 ` [PATCH 4/6] omap4: dpll: Enable all DPLL autoidle at boot Santosh Shilimkar
2011-01-31 23:17 ` Paul Walmsley
2011-02-01 5:24 ` Rajendra Nayak
2011-01-28 11:04 ` [PATCH 5/6] omap4: dpll: Add dpll api to control GATE_CTRL Santosh Shilimkar
2011-01-28 11:04 ` [PATCH 6/6] omap4: dpll: Enable auto gate control for all MX postdividers Santosh Shilimkar
2011-01-28 12:37 ` [PATCH 0/6] omap4: prcm: Few dpll, clockdomain and powerdomain updates Santosh Shilimkar
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