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[71.197.186.152]) by smtp.gmail.com with ESMTPSA id k137-20020a633d8f000000b0039800918b00sm10033798pga.77.2022.03.28.13.37.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 28 Mar 2022 13:37:52 -0700 (PDT) From: Kevin Hilman To: Lucas Tanure , Neil Armstrong , Jerome Brunet , Martin Blumenstingl Cc: linux-i2c@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-amlogic@lists.infradead.org, linux-kernel@vger.kernel.org, Lucas Tanure Subject: Re: [PATCH 0/3] Ensure Low period of SCL is correct In-Reply-To: <20220326102229.421718-1-tanure@linux.com> References: <20220326102229.421718-1-tanure@linux.com> Date: Mon, 28 Mar 2022 13:37:52 -0700 Message-ID: <7hee2lu82n.fsf@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20220328_133755_117032_4F8BEE40 X-CRM114-Status: UNSURE ( 8.31 ) X-CRM114-Notice: Please train this message. X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Lucas, Lucas Tanure writes: > The default duty cycle of 33% is less than the required > by the I2C specs for the LOW period of the SCL clock. > > So, for 100Khz or less, use 50%H/50%L duty cycle, and > for the clock above 100Khz, use 40%H/60%L duty cycle. > That ensures the low period of SCL is always more than > the minimum required by the specs at any given frequency. Thanks for the fixes! This is going to affect all SoCs, so ould you please summarize how your changes were tested, and on which SoCs & boards? Thanks, Kevin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel