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Mon, 12 Aug 2024 13:51:15 -0700 (PDT) Received: from localhost ([71.212.170.185]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-201cd14a6ffsm1059285ad.96.2024.08.12.13.51.14 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 12 Aug 2024 13:51:14 -0700 (PDT) From: Kevin Hilman To: Dhruva Gole , Markus Schneider-Pargmann Cc: Nishanth Menon , Tero Kristo , Santosh Shilimkar , Vibhore Vardhan , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org Subject: Re: [PATCH v9 4/4] firmware: ti_sci: add CPU latency constraint management In-Reply-To: <20240812101148.wpybfhqkd2kponp7@lcpd911> References: <20240809135347.2112634-1-msp@baylibre.com> <20240809135347.2112634-5-msp@baylibre.com> <20240812101148.wpybfhqkd2kponp7@lcpd911> Date: Mon, 12 Aug 2024 13:51:14 -0700 Message-ID: <7hfrr9pirh.fsf@baylibre.com> MIME-Version: 1.0 Content-Type: text/plain X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240812_135117_368399_FAD673CB X-CRM114-Status: GOOD ( 21.23 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Dhruva Gole writes: > Hello, > > On Aug 09, 2024 at 15:53:47 +0200, Markus Schneider-Pargmann wrote: >> From: Kevin Hilman >> >> During system-wide suspend, check if any of the CPUs have PM QoS >> resume latency constraints set. If so, set TI SCI constraint. >> >> TI SCI has a single system-wide latency constraint, so use the max of >> any of the CPU latencies as the system-wide value. >> >> Note: DM firmware clears all constraints at resume time, so >> constraints need to be checked/updated/sent at each system suspend. >> >> Co-developed-by: Vibhore Vardhan >> Signed-off-by: Vibhore Vardhan >> Signed-off-by: Kevin Hilman >> Reviewed-by: Dhruva Gole >> Signed-off-by: Dhruva Gole >> Signed-off-by: Markus Schneider-Pargmann >> --- >> drivers/firmware/ti_sci.c | 22 +++++++++++++++++++++- >> 1 file changed, 21 insertions(+), 1 deletion(-) >> >> diff --git a/drivers/firmware/ti_sci.c b/drivers/firmware/ti_sci.c >> index 5cbeca5df313..481b7649fde1 100644 >> --- a/drivers/firmware/ti_sci.c >> +++ b/drivers/firmware/ti_sci.c >> @@ -9,6 +9,7 @@ >> #define pr_fmt(fmt) "%s: " fmt, __func__ >> >> #include >> +#include >> #include >> #include >> #include >> @@ -19,6 +20,7 @@ >> #include >> #include >> #include >> +#include >> #include >> #include >> #include >> @@ -3639,7 +3641,25 @@ static int ti_sci_prepare_system_suspend(struct ti_sci_info *info) >> static int ti_sci_suspend(struct device *dev) >> { >> struct ti_sci_info *info = dev_get_drvdata(dev); >> - int ret; >> + struct device *cpu_dev; >> + s32 val, cpu_lat = 0; >> + int i, ret; >> + >> + if (info->fw_caps & MSG_FLAG_CAPS_LPM_DM_MANAGED) { >> + for_each_possible_cpu(i) { >> + cpu_dev = get_cpu_device(i); >> + val = dev_pm_qos_read_value(cpu_dev, DEV_PM_QOS_RESUME_LATENCY); >> + if (val != PM_QOS_RESUME_LATENCY_NO_CONSTRAINT) >> + cpu_lat = max(cpu_lat, val); >> + } >> + if (cpu_lat && cpu_lat != PM_QOS_RESUME_LATENCY_NO_CONSTRAINT) { >> + dev_dbg(cpu_dev, "%s: sending max CPU latency=%u\n", __func__, cpu_lat); > > An interesting observation was made which caused us to suspect this > code, the CPU on which the latency was actually being set was not being > printed here. It was always the cpu3 > > cpu cpu3: ti_sci_suspend: sending max CPU latency=100 > > If you look at how this print comes, it's always after all the cpu > indices have run, so by then the cpu_dev value will have always become > = nproc in the system. This makes debugging it confusing. Good catch. That's definitely a debug bug. :) Will fix in the next version. Thanks for the review & testing, Kevin