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[71.197.186.152]) by smtp.googlemail.com with ESMTPSA id p24sm131719146pfk.155.2019.01.11.14.42.38 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Fri, 11 Jan 2019 14:42:38 -0800 (PST) From: Kevin Hilman To: Martin Blumenstingl Subject: Re: [PATCH v3 1/2] pinctrl: meson: meson8b: add the eth_rxd2 and eth_rxd3 pins In-Reply-To: References: <20181229143556.27339-1-martin.blumenstingl@googlemail.com> <20181229143556.27339-2-martin.blumenstingl@googlemail.com> <7hzhs8ovag.fsf@baylibre.com> Date: Fri, 11 Jan 2019 14:42:37 -0800 Message-ID: <7hmuo6n7du.fsf@baylibre.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20190111_144240_896253_B9CF1F56 X-CRM114-Status: GOOD ( 16.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linus.luessing@c0d3.blue, jianxin.pan@amlogic.com, linus.walleij@linaro.org, linux-gpio@vger.kernel.org, ingrassia@epigenesys.com, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Martin Blumenstingl writes: > Hi Kevin, > > On Fri, Jan 11, 2019 at 2:08 AM Kevin Hilman wrote: >> >> Martin Blumenstingl writes: >> >> > Gigabit Ethernet requires the Ethernet TXD0..3 and RXD0..3 data lines. >> > Add the missing eth_rxd2 and eth_rxd3 definitions so we don't have to >> > rely on the bootloader to set them up correctly. >> > >> > The vendor u-boot sources for Odroid-C1 use the following Ethernet >> > pinmux configuration: >> > SET_CBUS_REG_MASK(PERIPHS_PIN_MUX_6, 0x3f4f); >> > SET_CBUS_REG_MASK(PERIPHS_PIN_MUX_7, 0xf00000); >> > This translates to the following pin groups in the mainline kernel: >> > - register 6 bit 0: eth_rxd1 (DIF_0_P) >> > - register 6 bit 1: eth_rxd0 (DIF_0_N) >> > - register 6 bit 2: eth_rx_dv (DIF_1_P) >> > - register 6 bit 3: eth_rx_clk (DIF_1_N) >> > - register 6 bit 6: eth_tx_en (DIF_3_P) >> > - register 6 bit 8: eth_ref_clk (DIF_3_N) >> > - register 6 bit 9: eth_mdc (DIF_4_P) >> > - register 6 bit 10: eth_mdio_en (DIF_4_N) >> > - register 6 bit 11: eth_tx_clk (GPIOH_9) >> > - register 6 bit 12: eth_txd2 (GPIOH_8) >> > - register 6 bit 13: eth_txd3 (GPIOH_7) >> > - register 7 bit 20: eth_txd0_0 (GPIOH_6) >> > - register 7 bit 21: eth_txd1_0 (GPIOH_5) >> > - register 7 bit 22: eth_rxd3 (DIF_2_P) >> > - register 7 bit 23: eth_rxd2 (DIF_2_N) >> > >> > All functions except eth_rxd2 and eth_rxd3 are already supported by the >> > pinctrl-meson8b driver. >> > >> > Suggested-by: Jianxin Pan >> > Signed-off-by: Martin Blumenstingl >> >> Reviewed-by: Kevin Hilman > thank you for reviewing this! > > I just realized that I forgot to CC the linux-gpio mailing list as > well as Linus Walleij on this patch (fixing that with this mail) - > sorry for that. > right now this patch is applied to linux-amlogic.git's v5.1/dt branch. That was a mistake I rectified earlier today. I meant to only apply the DT patch not the driver also. > please let me know whether you would like to keep it in your tree or > if you would like me to re-send it (including Linus and the linux-gpio > list this time...) Please resend including Linus, linux-gpio and my review tag. Thanks, Kevin _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel