Re: [PATCH v3] firmware: ti_sci: add CPU latency constraint management

[Kevin Hilman <khilman@baylibre.com>]

Nishanth Menon <nm@ti.com> writes:

> On 14:42-20240802, Kevin Hilman wrote:
>> During system-wide suspend, check if any of the CPUs have PM QoS
>> resume latency constraints set.  If so, set TI SCI constraint.
>> 
>> TI SCI has a single system-wide latency constraint, so use the max of
>> any of the CPU latencies as the system-wide value.
>> 
>> Note: DM firmware clears all constraints at resume time, so
>> constraints need to be checked/updated/sent at each system suspend.
>> 
>> Co-developed-by: Vibhore Vardhan <vibhore@ti.com>
>> Signed-off-by: Vibhore Vardhan <vibhore@ti.com>
>> Signed-off-by: Kevin Hilman <khilman@baylibre.com>
>> Reviewed-by: Dhruva Gole <d-gole@ti.com>
>> Signed-off-by: Dhruva Gole <d-gole@ti.com>
>> ---
>> Depends on the TI SCI series where support for the constraints APIs
>> are added:
>> https://lore.kernel.org/r/20240801195422.2296347-1-msp@baylibre.com
>> 
>
> Unless there is a reason to maintain this patch separately, Could we
> add this to the mentioned series -> it is much easier to review and
> merge them in one go.

Sure, they can be combined for the next version.

Kevin