From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id CECBEC3DA4A for ; Sun, 11 Aug 2024 02:43:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Transfer-Encoding: Content-Type:In-Reply-To:From:References:Cc:To:Subject:MIME-Version:Date: Message-ID:Reply-To:Content-ID:Content-Description:Resent-Date:Resent-From: Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=TyqL0k9akOlb2hvVIUqCD3E++zuDy0rXL3Yrg2o0Xvc=; b=s4BeL9MT2Yl0QBZnKR6a1lbdRr oZ8wzZpzQYyREDGRKZqvZXXjU7PBplGWN5yXgmIIoTot2j2Bdv9bluPg+ObAKvBnM4ppOmeABi4xT XKh2fRzpw/RKrkUjDJlXQxE3jy9ZHCLYY9mIIpS+mc9tTUj1y1P5LNvXrN3EkjaInW6MFb14Gx0Bo jXAwFKN99QEXuvEDjRQu6rk87pNShb/WT8UsOTU1ZbSLoj8WmcHp2RKpVOZsZZA+13gBI2uRLdE+x gnfMFlFXaludr4EHTXMx73fmfJL3PJXoivUgBjmq8BU+zmcIfzADmHNRzV3gnp1tyP+YSkZiP/TyD XSJWgeIA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1scyYX-0000000Euqr-3lqS; Sun, 11 Aug 2024 02:43:41 +0000 Received: from mail-pl1-x631.google.com ([2607:f8b0:4864:20::631]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1scyXw-0000000Eumj-0twO for linux-arm-kernel@lists.infradead.org; Sun, 11 Aug 2024 02:43:06 +0000 Received: by mail-pl1-x631.google.com with SMTP id d9443c01a7336-1fc569440e1so30355625ad.3 for ; Sat, 10 Aug 2024 19:43:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=broadcom.com; s=google; t=1723344181; x=1723948981; darn=lists.infradead.org; h=content-transfer-encoding:in-reply-to:autocrypt:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id:from:to:cc:subject:date:message-id:reply-to; bh=TyqL0k9akOlb2hvVIUqCD3E++zuDy0rXL3Yrg2o0Xvc=; b=K20EBLAu1lUPTlAiZ8dna17l+gf0X1zqpLROJa+gRl/i90R43Tot1n0rwEc2O+CHot XqeV9YHxJjK53csDWL2FwL/SFONFbopRXG1uIg5+5r35KoDIb+1ZLNXkPQxWegmAx+A2 IgyY05ofuRfsHxFI9vkr8z4kqT+GZut44JRdY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20230601; t=1723344181; x=1723948981; h=content-transfer-encoding:in-reply-to:autocrypt:from :content-language:references:cc:to:subject:user-agent:mime-version :date:message-id:x-gm-message-state:from:to:cc:subject:date :message-id:reply-to; bh=TyqL0k9akOlb2hvVIUqCD3E++zuDy0rXL3Yrg2o0Xvc=; b=pzxnGCm5bDPvDk/znaoypZE6mzlK3aSC3mj6s+EaF84s3XaJr9zqfUxhw3x0VRTy5C eB1EdlLyFJrRaJ1eH/YkidS2btEYtjKrXDuZHx7Yhi2h0TZij2uiTfpckw+whY8nkwyX kfT8Z0Pk+eJTRy/hCwdmk62jHzU1L3sZPo0L9xYV66IviIGjUgzP8jJhnK+L245hFrt0 x6mgEsuk+F7uwnYpUtYlVoQkPsvnInG5MCvRS5xzHKI7wEHK76jThazhiOXcbXOgLla3 RhhdFiANPQYn6axPU45HiKQaXVzwGRPHx5ezN7YkGOpa6m+dX0x0m6z4XHt8If/hw9a3 +9Lg== X-Gm-Message-State: AOJu0YzI6o/AlrZuP6nPag5buHN/c9ZAec58eU1I5YqH2Cf/UpDwdqt9 TGOdW5Y+sZtsdzal+A/fBoWBsupAdR95W/C3hb8VuJjDvyqr71FHHTxPQ8krbHATD3JTOqDCoss ehs6ijdh9f6tEP1OkJ8uh/EhAIcaVAk10D2/TzDTf5dae/0OYA7CaA8slCC6nVlJSj1EHAmnx2m 2RpJEPgvFBmUuqwpe+1lCmCvfvgocD9s+tvErih0VbljWgJ+D0mPxtTFMUYmikOvCK X-Google-Smtp-Source: AGHT+IH2Pnqy6bqQWwC0ZO+/SqLviXkATatRPH04u/7yu8gdi0EZ0ol/OggQFXPL4I4OxOBl9Zy2Ng== X-Received: by 2002:a17:902:d492:b0:1fd:664b:224 with SMTP id d9443c01a7336-200ae60a518mr65172165ad.56.1723344180904; Sat, 10 Aug 2024 19:43:00 -0700 (PDT) Received: from [192.168.1.3] (ip68-4-215-93.oc.oc.cox.net. [68.4.215.93]) by smtp.gmail.com with ESMTPSA id d9443c01a7336-200bbb63778sm16913035ad.302.2024.08.10.19.42.59 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Sat, 10 Aug 2024 19:43:00 -0700 (PDT) Message-ID: <80a257e8-65fb-4545-a00d-9cb793d1b120@broadcom.com> Date: Sat, 10 Aug 2024 19:42:59 -0700 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH 2/2] firmware: arm_scmi: Support 'reg-io-width' property for shared memory To: linux-arm-kernel@lists.infradead.org Cc: Rob Herring , Krzysztof Kozlowski , Conor Dooley , Sudeep Holla , Cristian Marussi , "open list:OPEN FIRMWARE AND FLATTENED DEVICE TREE BINDINGS" , open list , arm-scmi@vger.kernel.org, james.quinlan@broadcom.com, justin.chen@broadcom.com, kapil.hali@broadcom.com, bcm-kernel-feedback-list@broadcom.com References: <20240810214621.14417-1-florian.fainelli@broadcom.com> <20240810214621.14417-3-florian.fainelli@broadcom.com> Content-Language: en-US From: Florian Fainelli Autocrypt: addr=florian.fainelli@broadcom.com; keydata= xsBNBFPAG8ABCAC3EO02urEwipgbUNJ1r6oI2Vr/+uE389lSEShN2PmL3MVnzhViSAtrYxeT M0Txqn1tOWoIc4QUl6Ggqf5KP6FoRkCrgMMTnUAINsINYXK+3OLe7HjP10h2jDRX4Ajs4Ghs JrZOBru6rH0YrgAhr6O5gG7NE1jhly+EsOa2MpwOiXO4DE/YKZGuVe6Bh87WqmILs9KvnNrQ PcycQnYKTVpqE95d4M824M5cuRB6D1GrYovCsjA9uxo22kPdOoQRAu5gBBn3AdtALFyQj9DQ KQuc39/i/Kt6XLZ/RsBc6qLs+p+JnEuPJngTSfWvzGjpx0nkwCMi4yBb+xk7Hki4kEslABEB AAHNMEZsb3JpYW4gRmFpbmVsbGkgPGZsb3JpYW4uZmFpbmVsbGlAYnJvYWRjb20uY29tPsLB IQQQAQgAywUCZWl41AUJI+Jo+hcKAAG/SMv+fS3xUQWa0NryPuoRGjsA3SAUAAAAAAAWAAFr ZXktdXNhZ2UtbWFza0BwZ3AuY29tjDAUgAAAAAAgAAdwcmVmZXJyZWQtZW1haWwtZW5jb2Rp bmdAcGdwLmNvbXBncG1pbWUICwkIBwMCAQoFF4AAAAAZGGxkYXA6Ly9rZXlzLmJyb2FkY29t Lm5ldAUbAwAAAAMWAgEFHgEAAAAEFQgJChYhBNXZKpfnkVze1+R8aIExtcQpvGagAAoJEIEx tcQpvGagWPEH/2l0DNr9QkTwJUxOoP9wgHfmVhqc0ZlDsBFv91I3BbhGKI5UATbipKNqG13Z TsBrJHcrnCqnTRS+8n9/myOF0ng2A4YT0EJnayzHugXm+hrkO5O9UEPJ8a+0553VqyoFhHqA zjxj8fUu1px5cbb4R9G4UAySqyeLLeqnYLCKb4+GklGSBGsLMYvLmIDNYlkhMdnnzsSUAS61 WJYW6jjnzMwuKJ0ZHv7xZvSHyhIsFRiYiEs44kiYjbUUMcXor/uLEuTIazGrE3MahuGdjpT2 IOjoMiTsbMc0yfhHp6G/2E769oDXMVxCCbMVpA+LUtVIQEA+8Zr6mX0Yk4nDS7OiBlvOwE0E U8AbwQEIAKxr71oqe+0+MYCc7WafWEcpQHFUwvYLcdBoOnmJPxDwDRpvU5LhqSPvk/yJdh9k 4xUDQu3rm1qIW2I9Puk5n/Jz/lZsqGw8T13DKyu8eMcvaA/irm9lX9El27DPHy/0qsxmxVmU pu9y9S+BmaMb2CM9IuyxMWEl9ruWFS2jAWh/R8CrdnL6+zLk60R7XGzmSJqF09vYNlJ6Bdbs MWDXkYWWP5Ub1ZJGNJQ4qT7g8IN0qXxzLQsmz6tbgLMEHYBGx80bBF8AkdThd6SLhreCN7Uh IR/5NXGqotAZao2xlDpJLuOMQtoH9WVNuuxQQZHVd8if+yp6yRJ5DAmIUt5CCPcAEQEAAcLB gQQYAQIBKwUCU8AbwgUbDAAAAMBdIAQZAQgABgUCU8AbwQAKCRCTYAaomC8PVQ0VCACWk3n+ obFABEp5Rg6Qvspi9kWXcwCcfZV41OIYWhXMoc57ssjCand5noZi8bKg0bxw4qsg+9cNgZ3P N/DFWcNKcAT3Z2/4fTnJqdJS//YcEhlr8uGs+ZWFcqAPbteFCM4dGDRruo69IrHfyyQGx16s CcFlrN8vD066RKevFepb/ml7eYEdN5SRALyEdQMKeCSf3mectdoECEqdF/MWpfWIYQ1hEfdm C2Kztm+h3Nkt9ZQLqc3wsPJZmbD9T0c9Rphfypgw/SfTf2/CHoYVkKqwUIzI59itl5Lze+R5 wDByhWHx2Ud2R7SudmT9XK1e0x7W7a5z11Q6vrzuED5nQvkhAAoJEIExtcQpvGagugcIAJd5 EYe6KM6Y6RvI6TvHp+QgbU5dxvjqSiSvam0Ms3QrLidCtantcGT2Wz/2PlbZqkoJxMQc40rb fXa4xQSvJYj0GWpadrDJUvUu3LEsunDCxdWrmbmwGRKqZraV2oG7YEddmDqOe0Xm/NxeSobc MIlnaE6V0U8f5zNHB7Y46yJjjYT/Ds1TJo3pvwevDWPvv6rdBeV07D9s43frUS6xYd1uFxHC 7dZYWJjZmyUf5evr1W1gCgwLXG0PEi9n3qmz1lelQ8lSocmvxBKtMbX/OKhAfuP/iIwnTsww 95A2SaPiQZA51NywV8OFgsN0ITl2PlZ4Tp9hHERDe6nQCsNI/Us= In-Reply-To: <20240810214621.14417-3-florian.fainelli@broadcom.com> Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240810_194304_367579_BE0F89B1 X-CRM114-Status: GOOD ( 25.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 8/10/2024 2:46 PM, Florian Fainelli wrote: > Some shared memory areas might only support a certain access width, > (e.g.: 32 bits accesses only). Update the shmem layer to support > reading from and writing to such shared memory area using the specified > I/O width in the Device Tree. The various transport layers making use of > the shmem.c code are updated accordingly to pass the I/O width to the > routines that need it. > > Signed-off-by: Florian Fainelli Doing a self review, though I will only resend after collecting additional feedback. > --- > drivers/firmware/arm_scmi/common.h | 14 +++- > .../arm_scmi/scmi_transport_mailbox.c | 12 ++- > .../firmware/arm_scmi/scmi_transport_optee.c | 7 +- > .../firmware/arm_scmi/scmi_transport_smc.c | 10 ++- > drivers/firmware/arm_scmi/shmem.c | 77 ++++++++++++++++--- > 5 files changed, 96 insertions(+), 24 deletions(-) > > diff --git a/drivers/firmware/arm_scmi/common.h b/drivers/firmware/arm_scmi/common.h > index 69928bbd01c2..97dae844a190 100644 > --- a/drivers/firmware/arm_scmi/common.h > +++ b/drivers/firmware/arm_scmi/common.h > @@ -170,6 +170,7 @@ void scmi_protocol_release(const struct scmi_handle *handle, u8 protocol_id); > * This can be dynamically set by transports at run-time > * inside their provided .chan_setup(). > * @transport_info: Transport layer related information > + * @shmem_io_width: I/O width in bytes of the shared memory area > */ > struct scmi_chan_info { > int id; > @@ -178,6 +179,7 @@ struct scmi_chan_info { > struct scmi_handle *handle; > bool no_completion_irq; > void *transport_info; > + u32 shmem_io_width; This is not used because the individual transports store the shmem_io_width in their own transport_info structure. [snip] > > +#define __shmem_copy_toio_tpl(s) \ > + for (unsigned int i = 0; i < xfer->tx.len; i += shmem_io_width) \ > + iowrite##s(((u##s *)(xfer->tx.buf))[i / shmem_io_width], \ > + shmem->msg_payload + i); > + > +#define __shmem_copy_fromio_tpl(s) \ > + for (unsigned int i = 0; i < xfer->rx.len; i += shmem_io_width) \ > + ((u##s *)(xfer->rx.buf))[i / shmem_io_width] = \ > + ioread##s(shmem->msg_payload + shmem_io_width + i); This needs to be shmem->msg_payload + 4 + i. This worked in my testing because I was precisely tseting with 'reg-io-width = <4>'. [snip] > > static u32 shmem_read_header(struct scmi_shared_mem __iomem *shmem) > @@ -81,8 +109,34 @@ static u32 shmem_read_header(struct scmi_shared_mem __iomem *shmem) > return ioread32(&shmem->msg_header); > } > > +static void __shmem_fetch_resp_notif_data(struct scmi_xfer *xfer, > + struct scmi_shared_mem __iomem *shmem, > + u32 shmem_io_width) > +{ > + /* Take a copy to the rx buffer.. */ > + switch (shmem_io_width) { > + case 1: > + __shmem_copy_fromio_tpl(8); > + break; > + case 2: > + __shmem_copy_fromio_tpl(16); > + break; > + case 4: > + __shmem_copy_fromio_tpl(32); > + break; > + case 8: > + __shmem_copy_fromio_tpl(32); This should be 64 and it looks like ioread64/iowrite64 is not necessarily defined for 32-bit configurations, so this needs to be gated with a CONFIG_64BIT define here since ioread64/iowrite64 in include/asm-generic/io.h is defined that way. -- Florian