From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-15.9 required=3.0 tests=BAYES_00,DKIMWL_WL_HIGH, DKIM_SIGNED,DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,NICE_REPLY_A,SPF_HELO_NONE,SPF_PASS, URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 7427FC433DB for ; Fri, 12 Feb 2021 15:46:28 +0000 (UTC) Received: from merlin.infradead.org (merlin.infradead.org [205.233.59.134]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 2D91964E05 for ; Fri, 12 Feb 2021 15:46:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 2D91964E05 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=arm.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=merlin.20170209; h=Sender:Content-Type: Content-Transfer-Encoding:Cc:List-Subscribe:List-Help:List-Post:List-Archive: List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date:Message-ID:From: References:To:Subject:Reply-To:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=TMgjaS7FpXVUwCB4FUPwaRdOrPPlt181oOMihBTBcdk=; b=EZmOefLO7+iTN2bENOsjZxaY7 n0iKgoIxtdPWtW+SKCW3mWSi5aK27TccOBcmXGA+zbJRD/mAndTqdamqTOI2WVWvdkqo7PsRaGNcx iUxysysIrJ1P/o3iCaJnEzjRDoEuR0eYD4sTW2Qu2tO41AiKooCEYJg70Eq6SqLX44pYtD2V/VJbG ltIkTar3Gq5B6lo+0kLH2XYmDxok9Nu4R5QB7WK7k2S3OZFUMupuNMQisUC679ZPrhP4h8E19fFs1 29QVqrqpoqmvjnFruexczc3fAbnUoqTFJbI8l4G9bvL7ikE4Xpa8myx/PW6GbhIwZLNmNLw0aKzqW 9XoGC4R2Q==; Received: from localhost ([::1] helo=merlin.infradead.org) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lAad8-0004Y0-Hf; Fri, 12 Feb 2021 15:45:14 +0000 Received: from foss.arm.com ([217.140.110.172]) by merlin.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1lAad6-0004Xd-6f for linux-arm-kernel@lists.infradead.org; Fri, 12 Feb 2021 15:45:13 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 3F9671063; Fri, 12 Feb 2021 07:45:09 -0800 (PST) Received: from [10.57.44.108] (unknown [10.57.44.108]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id C2C7A3F73B; Fri, 12 Feb 2021 07:45:07 -0800 (PST) Subject: Re: [boot-wrapper] [PATCH] aarch64: Enable TRBE for the non-secure world To: Alexandru Elisei , Anshuman Khandual , linux-arm-kernel@lists.infradead.org References: <1613042797-13109-1-git-send-email-anshuman.khandual@arm.com> <0d87e2a5-1c9a-9a8a-96e2-0b335d7445e7@arm.com> From: Suzuki K Poulose Message-ID: <81d47675-c628-1bb9-d410-46579f4b5175@arm.com> Date: Fri, 12 Feb 2021 15:44:57 +0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.7.0 MIME-Version: 1.0 In-Reply-To: <0d87e2a5-1c9a-9a8a-96e2-0b335d7445e7@arm.com> Content-Language: en-GB X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20210212_104512_337925_95F6781E X-CRM114-Status: GOOD ( 18.67 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: mark.rutland@arm.com, Andre.Przywara@arm.com, james.morse@arm.com Content-Transfer-Encoding: 7bit Content-Type: text/plain; charset="us-ascii"; Format="flowed" Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 2/12/21 2:31 PM, Alexandru Elisei wrote: > Hello Anshuman, > > On 2/11/21 11:26 AM, Anshuman Khandual wrote: >> MDCR_EL3.NSTB resets to an UNKNOWN value. Configure it to allow the trace >> buffer to use non-secure memory and to permit direct register accesses from >> the non-secure world. Before that, just check AA64DFR0_EL1.TraceBuffer and >> make sure TRBE is implemented. We still continue to reset MDCR_EL3 register >> to zero with the exception of MDCR_EL3.NSPB and MDCR_EL3.NSTB. >> >> Signed-off-by: Anshuman Khandual >> --- >> arch/aarch64/boot.S | 8 ++++++++ >> 1 file changed, 8 insertions(+) >> >> diff --git a/arch/aarch64/boot.S b/arch/aarch64/boot.S >> index 37f4b98..e47cf59 100644 >> --- a/arch/aarch64/boot.S >> +++ b/arch/aarch64/boot.S >> @@ -71,6 +71,14 @@ _start: >> ldr x1, =(0x3 << 12) >> orr x0, x0, x1 >> >> +1: mrs x1, id_aa64dfr0_el1 >> + ubfx x1, x1, #44, #4 >> + cbz x1, 1f >> + >> + // Enable TRBE for the non-secure world. >> + ldr x1, =(0x3 << 24) >> + orr x0, x0, x1 >> + >> 1: msr mdcr_el3, x0 // Disable traps to EL3 >> >> mrs x0, id_aa64pfr0_el1 > > That's strange, I'm looking at ARM DDI 0487G.a and bits [44:47] from > ID_AA64DFR0_EL1 are RES0 and there is no TraceBuffer field; bits [24:25] of > MDCR_EL3 are also RES0 and I searched the entire file for the NSTB field, could > not find it. Do I have an outdated version of the architecture? They are not in the Arm ARM. These are part of the Future Architecture technology changes, for which the register defintions are available here : https://developer.arm.com/documentation/ddi0601/2020-12/AArch64-Registers/ Cheers Suzuki > > Thanks, > > Alex > _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel