From: Robin Murphy <robin.murphy@arm.com>
To: will@kernel.org
Cc: mark.rutland@arm.com, linux-perf-users@vger.kernel.org,
linux-arm-kernel@lists.infradead.org
Subject: [PATCH] perf/arm_cspmu: Add Arm system PMU
Date: Wed, 9 Sep 2026 17:23:00 +0100 [thread overview]
Message-ID: <84a65061841c8870375ee6b0621dd3f61651763d.1788970980.git.robin.murphy@arm.com> (raw)
Arm's latest Compute Subsystems and SoCs are using a common PMU block
in various places which can mostly just be driven as a generic 64-bit
CoreSight PMU, but does have an IMP-DEF register for additional
filtering. The details of event and filter encodings depend on the
particular PMU instance, so are left to the higher level Arm Telemetry
Solution tooling.
Signed-off-by: Robin Murphy <robin.murphy@arm.com>
---
drivers/perf/arm_cspmu/Kconfig | 7 +++
drivers/perf/arm_cspmu/Makefile | 1 +
drivers/perf/arm_cspmu/arm_cspmu.c | 7 +++
drivers/perf/arm_cspmu/arm_cspmu.h | 1 +
drivers/perf/arm_cspmu/arm_syspmu.c | 67 +++++++++++++++++++++++++++++
5 files changed, 83 insertions(+)
create mode 100644 drivers/perf/arm_cspmu/arm_syspmu.c
diff --git a/drivers/perf/arm_cspmu/Kconfig b/drivers/perf/arm_cspmu/Kconfig
index 004c1c2ee2ad..d44916312c77 100644
--- a/drivers/perf/arm_cspmu/Kconfig
+++ b/drivers/perf/arm_cspmu/Kconfig
@@ -28,6 +28,13 @@ config AMPERE_CORESIGHT_PMU_ARCH_SYSTEM_PMU
In the first phase, the driver enables support on MCU PMU used in
AmpereOne SoC family.
+config ARM_SYSTEM_PMU
+ tristate "Arm System PMU"
+ depends on ARM_CORESIGHT_PMU_ARCH_SYSTEM_PMU
+ help
+ Support additional event filtering attributes for the CoreSight-based
+ PMU blocks found in various parts of Arm Compute Subsystems and SoCs.
+
config ARM_BMU
tristate "ARM Bus Monitor Unit"
depends on ARM64 || COMPILE_TEST
diff --git a/drivers/perf/arm_cspmu/Makefile b/drivers/perf/arm_cspmu/Makefile
index 0bb4d510fc49..c9c42227a3ad 100644
--- a/drivers/perf/arm_cspmu/Makefile
+++ b/drivers/perf/arm_cspmu/Makefile
@@ -8,6 +8,7 @@ arm_cspmu_module-y := arm_cspmu.o
obj-$(CONFIG_NVIDIA_CORESIGHT_PMU_ARCH_SYSTEM_PMU) += nvidia_cspmu.o
obj-$(CONFIG_AMPERE_CORESIGHT_PMU_ARCH_SYSTEM_PMU) += ampere_cspmu.o
+obj-$(CONFIG_ARM_SYSTEM_PMU) += arm_syspmu.o
obj-$(CONFIG_ARM_BMU) += arm-bmu.o
obj-$(CONFIG_ARM_DMC750) += arm-dmc750.o
diff --git a/drivers/perf/arm_cspmu/arm_cspmu.c b/drivers/perf/arm_cspmu/arm_cspmu.c
index 912f03ce3ef5..9f298ea1a974 100644
--- a/drivers/perf/arm_cspmu/arm_cspmu.c
+++ b/drivers/perf/arm_cspmu/arm_cspmu.c
@@ -358,6 +358,13 @@ static struct arm_cspmu_impl_match impl_match[] = {
.module = NULL,
.impl_init_ops = NULL,
},
+ {
+ .module_name = "arm_syspmu",
+ .pmiidr_val = ARM_CSPMU_IMPL_ID_ARM,
+ .pmiidr_mask = PMIIDR_IMPLEMENTER,
+ .module = NULL,
+ .impl_init_ops = NULL,
+ },
{
.module_name = "ampere_cspmu",
.pmiidr_val = ARM_CSPMU_IMPL_ID_AMPERE,
diff --git a/drivers/perf/arm_cspmu/arm_cspmu.h b/drivers/perf/arm_cspmu/arm_cspmu.h
index c4058d602477..03e34692a965 100644
--- a/drivers/perf/arm_cspmu/arm_cspmu.h
+++ b/drivers/perf/arm_cspmu/arm_cspmu.h
@@ -149,6 +149,7 @@
/* JEDEC-assigned JEP106 identification code */
#define ARM_CSPMU_IMPL_ID_NVIDIA 0x36B
+#define ARM_CSPMU_IMPL_ID_ARM 0x43B
#define ARM_CSPMU_IMPL_ID_AMPERE 0xA16
/* PMDEVARCH */
diff --git a/drivers/perf/arm_cspmu/arm_syspmu.c b/drivers/perf/arm_cspmu/arm_syspmu.c
new file mode 100644
index 000000000000..ac234768a2f8
--- /dev/null
+++ b/drivers/perf/arm_cspmu/arm_syspmu.c
@@ -0,0 +1,67 @@
+// SPDX-License-Identifier: GPL-2.0
+
+#include <linux/io.h>
+#include <linux/module.h>
+
+#include "arm_cspmu.h"
+
+#define PMEVFILT3R 0x200
+
+static struct attribute *arm_syspmu_format_attrs[] = {
+ ARM_CSPMU_FORMAT_EVENT_ATTR,
+ ARM_CSPMU_FORMAT_FILTER_ATTR,
+ ARM_CSPMU_FORMAT_FILTER2_ATTR,
+ ARM_CSPMU_FORMAT_ATTR(filter3, "config3:0-63"),
+ NULL,
+};
+
+static struct attribute **arm_syspmu_get_format_attrs(const struct arm_cspmu *cspmu)
+{
+ return devm_kmemdup(cspmu->dev, arm_syspmu_format_attrs,
+ sizeof(arm_syspmu_format_attrs), GFP_KERNEL);
+}
+
+static void arm_syspmu_set_ev_filter(struct arm_cspmu *cspmu,
+ const struct perf_event *event)
+{
+ u32 offset = 8 * event->hw.idx;
+
+ writeq(event->attr.config1, cspmu->base0 + PMEVFILTR + offset);
+ writeq(event->attr.config2, cspmu->base0 + PMEVFILT2R + offset);
+ writeq(event->attr.config3, cspmu->base0 + PMEVFILT3R + offset);
+}
+
+static int arm_syspmu_init_ops(struct arm_cspmu *cspmu)
+{
+ switch (FIELD_GET(PMIIDR_PRODUCTID, cspmu->impl.pmiidr)) {
+ case 0x9c3:
+ cspmu->impl.ops.set_ev_filter = arm_syspmu_set_ev_filter;
+ cspmu->impl.ops.get_format_attrs = arm_syspmu_get_format_attrs;
+ break;
+ default:
+ break;
+ }
+ return 0;
+}
+
+static const struct arm_cspmu_impl_match arm_syspmu_param = {
+ .pmiidr_val = ARM_CSPMU_IMPL_ID_ARM,
+ .module = THIS_MODULE,
+ .impl_init_ops = arm_syspmu_init_ops
+};
+
+static int __init arm_syspmu_init(void)
+{
+ return arm_cspmu_impl_register(&arm_syspmu_param);
+}
+
+static void __exit arm_syspmu_exit(void)
+{
+ arm_cspmu_impl_unregister(&arm_syspmu_param);
+}
+
+module_init(arm_syspmu_init);
+module_exit(arm_syspmu_exit);
+
+MODULE_DESCRIPTION("Arm System PMU Driver");
+MODULE_LICENSE("GPL");
--
2.54.0.dirty
next reply other threads:[~2026-09-09 16:23 UTC|newest]
Thread overview: 3+ messages / expand[flat|nested] mbox.gz Atom feed top
2026-09-09 16:23 Robin Murphy [this message]
2026-10-04 17:26 ` [PATCH] perf/arm_cspmu: Add Arm system PMU Will Deacon
2026-10-05 12:29 ` Robin Murphy
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