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Mon, 07 Oct 2024 19:52:17 -0700 (PDT) X-Google-Smtp-Source: AGHT+IENsa/q7SoMe551s0e4cZsDtqunjGqFm6PflV4U0LuYkndGEcrIqyHC1aiUGs/dtevm0SUCUA== X-Received: by 2002:a05:6a21:a24c:b0:1cf:3d14:6921 with SMTP id adf61e73a8af0-1d6dfabc386mr1247865637.35.1728355937364; Mon, 07 Oct 2024 19:52:17 -0700 (PDT) Received: from [192.168.68.54] ([103.210.27.132]) by smtp.gmail.com with ESMTPSA id d2e1a72fcca58-71df0cd2a1bsm5112671b3a.85.2024.10.07.19.52.10 (version=TLS1_3 cipher=TLS_AES_128_GCM_SHA256 bits=128/128); Mon, 07 Oct 2024 19:52:16 -0700 (PDT) Message-ID: <85192743-4bb0-41bb-8ac6-6965cb149307@redhat.com> Date: Tue, 8 Oct 2024 12:52:08 +1000 MIME-Version: 1.0 User-Agent: Mozilla Thunderbird Subject: Re: [PATCH v6 08/11] arm64: mm: Avoid TLBI when marking pages as valid To: Steven Price , kvm@vger.kernel.org, kvmarm@lists.linux.dev Cc: Catalin Marinas , Marc Zyngier , Will Deacon , James Morse , Oliver Upton , Suzuki K Poulose , Zenghui Yu , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, Joey Gouly , Alexandru Elisei , Christoffer Dall , Fuad Tabba , linux-coco@lists.linux.dev, Ganapatrao Kulkarni , Shanker Donthineni , Alper Gun , "Aneesh Kumar K . V" References: <20241004144307.66199-1-steven.price@arm.com> <20241004144307.66199-9-steven.price@arm.com> From: Gavin Shan In-Reply-To: <20241004144307.66199-9-steven.price@arm.com> X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-US Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 7bit X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241007_195220_822272_7A6ECA33 X-CRM114-Status: GOOD ( 11.72 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/5/24 12:43 AM, Steven Price wrote: > When __change_memory_common() is purely setting the valid bit on a PTE > (e.g. via the set_memory_valid() call) there is no need for a TLBI as > either the entry isn't changing (the valid bit was already set) or the > entry was invalid and so should not have been cached in the TLB. > > Reviewed-by: Catalin Marinas > Signed-off-by: Steven Price > --- > v4: New patch > --- > arch/arm64/mm/pageattr.c | 8 +++++++- > 1 file changed, 7 insertions(+), 1 deletion(-) > Reviewed-by: Gavin Shan