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From: Marc Zyngier <maz@kernel.org>
To: Shaoqin Huang <shahuang@redhat.com>
Cc: Oliver Upton <oliver.upton@linux.dev>,
	kvmarm@lists.linux.dev, James Morse <james.morse@arm.com>,
	Suzuki K Poulose <suzuki.poulose@arm.com>,
	Zenghui Yu <yuzenghui@huawei.com>,
	Catalin Marinas <catalin.marinas@arm.com>,
	Will Deacon <will@kernel.org>,
	linux-arm-kernel@lists.infradead.org,
	linux-kernel@vger.kernel.org
Subject: Re: [PATCH v2 1/2] KVM: arm64: Allow userspace to change ID_AA64PFR1_EL1
Date: Fri, 21 Jun 2024 08:53:32 +0100	[thread overview]
Message-ID: <861q4qk9z7.wl-maz@kernel.org> (raw)
In-Reply-To: <f73cabc6-8c48-4c12-9d60-269e50df41f3@redhat.com>

On Fri, 21 Jun 2024 07:17:57 +0100,
Shaoqin Huang <shahuang@redhat.com> wrote:
> 
> Hi Marc,
> 
> On 6/18/24 15:39, Marc Zyngier wrote:
> > On Tue, 18 Jun 2024 07:38:06 +0100,
> > Shaoqin Huang <shahuang@redhat.com> wrote:
> >> 
> >> Allow userspace to change the guest-visible value of the register with
> >> some severe limitation:
> >> 
> >>    - No changes to features not virtualized by KVM (MPAM_frac, RAS_frac)
> >> ---
> >>   arch/arm64/kvm/sys_regs.c | 3 ++-
> >>   1 file changed, 2 insertions(+), 1 deletion(-)
> >> 
> >> diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c
> >> index 22b45a15d068..bead81867bce 100644
> >> --- a/arch/arm64/kvm/sys_regs.c
> >> +++ b/arch/arm64/kvm/sys_regs.c
> >> @@ -2306,7 +2306,8 @@ static const struct sys_reg_desc sys_reg_descs[] = {
> >>   		   ID_AA64PFR0_EL1_GIC |
> >>   		   ID_AA64PFR0_EL1_AdvSIMD |
> >>   		   ID_AA64PFR0_EL1_FP), },
> >> -	ID_SANITISED(ID_AA64PFR1_EL1),
> >> +	ID_WRITABLE(ID_AA64PFR1_EL1, ~(ID_AA64PFR1_EL1_RAS_frac |
> >> +				       ID_AA64PFR1_EL1_MPAM_frac)),
> >>   	ID_UNALLOCATED(4,2),
> >>   	ID_UNALLOCATED(4,3),
> >>   	ID_WRITABLE(ID_AA64ZFR0_EL1, ~ID_AA64ZFR0_EL1_RES0),
> > 
> > This isn't a valid patch.
> > 
> > Furthermore, how about all the other features that may or may not be
> > currently handled by KVM? Please see [1] and make sure that all
> > existing fields have a known behaviour (a combination of masked,
> > preserved, capped, writable or read-only).
> > 
> > I can at least see problems with MTE_frac and MTEX, plus all the other
> > things that KVM doesn't know how to save/restore (THE, GCS, NMI...).
> > 
> > What I asked you to handle the whole register, I really meant it.
> 
> I currently only found the BT and SSBS fields can be written without
> any unknown behavior.

I can only assume you haven't looked hard enough.

> 
> All other fields in the ID_AA64PFR1_EL1 are either not supported by
> KVM or the field involved with other register and KVM don't know how
> to handle them.

Why can't CSV2_frac be writable? Why can't most of the other fields be
hidden depending on the VM configuration, as pointed out above?

	M.

-- 
Without deviation from the norm, progress is not possible.


  reply	other threads:[~2024-06-21  7:53 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2024-06-18  6:38 [PATCH v2 0/2] Allow userspace to change ID_AA64PFR1_EL1 Shaoqin Huang
2024-06-18  6:38 ` [PATCH v2 1/2] KVM: arm64: " Shaoqin Huang
2024-06-18  7:39   ` Marc Zyngier
2024-06-19  3:14     ` Shaoqin Huang
2024-06-21  6:17     ` Shaoqin Huang
2024-06-21  7:53       ` Marc Zyngier [this message]
2024-06-26  7:33         ` Shaoqin Huang
2024-06-26  9:01           ` Shaoqin Huang
2024-06-18  6:38 ` [PATCH v2 2/2] KVM: selftests: aarch64: Add writable test for ID_AA64PFR1_EL1 Shaoqin Huang

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