From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id B8E3EC54E5D for ; Mon, 18 Mar 2024 11:45:34 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=sM570O/BoKE2uaBqgkIlo3TYTx8rZMdrcltBj/XumYA=; b=RNeRY/Y7NYRwJm LUYmxWsfZ8QhSdIgObOnvWH0CWMYUUs9EhhKL2qlIWRGmtcywHxXWqAilPfo8VBCEz2qb8yZSdx7g nGaBppL334B1VJvS4gHknnPZnnhJlxxKDmaBfrrwwFLDsyv/a1tAOnptTJLQ4dpxg1uteuG9ws3m9 OkHxu7bEzcIUHQn7r1SV6NZLmlh3ZZiFaJs95drgD2+FvGLrewCC218okgLsSxZHUM12Czdy/xBFa qruELyHViH6EF+9AcmGGkctnWDD13WL5yElQRq1Tz1ZmP6E85xMdidOVuDLXVvaH20Co6TZ61Lm8J BrZNP2NrEkVJ0gRbYuCg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rmBQh-00000008QmN-37We; Mon, 18 Mar 2024 11:45:23 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rmBQb-00000008Qje-37ML for linux-arm-kernel@lists.infradead.org; Mon, 18 Mar 2024 11:45:21 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id 8E94460C17; Mon, 18 Mar 2024 11:45:16 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 39A41C433C7; Mon, 18 Mar 2024 11:45:16 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1710762316; bh=vp6/if81oVUs+4yoGVf48qpm+QepcAiQjU6gYsiuU7A=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=V2QbGmYneQ30JuaTz6S+2XPLLKeTaPyQCZEjl2oqFL7RB5sAp900GhJM+ew/mDVED GFNS4Hr/2oJdLsB4MOyCZU4Wm0tJZcZfu6ca1LAFw6r0NroOAB+4LNaMcQm288gxgW Chldk9Q1BvS6DYNkVEN+lBP3t32tvgWomolOp5BRZ4bS9f9x18+80tEP4j3WuxNBJC 7OHHjq+RHuL8zr1ALOh8Reotlk7HpvejFQasE+JNTxhb7rg4uUdENnS1EQFqVbMw2Z HubFNfvhNulp+Z9+uN9Nct9uL+AMQp4mSgnTG1L7E4rj5T3x/AcA0yWblJQO6REKBU hGifjgMKHJ/GA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1rmBQY-00DGQp-Bp; Mon, 18 Mar 2024 11:45:14 +0000 Date: Mon, 18 Mar 2024 11:45:14 +0000 Message-ID: <8634sn227p.wl-maz@kernel.org> From: Marc Zyngier To: Sebastian Ott Cc: linux-arm-kernel@lists.infradead.org, Oliver Upton , James Morse , Suzuki K Poulose , kvmarm Subject: Re: [PATCH 1/4] KVM: arm64: add emulation for CTR_EL0 register In-Reply-To: <20240318111636.10613-2-sebott@redhat.com> References: <20240318111636.10613-1-sebott@redhat.com> <20240318111636.10613-2-sebott@redhat.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: sebott@redhat.com, linux-arm-kernel@lists.infradead.org, oliver.upton@linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, kvmarm@lists.linux.dev X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240318_044518_044942_08EFA8E0 X-CRM114-Status: GOOD ( 26.17 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Please add all the reviewers and the relevant mailing lists. On Mon, 18 Mar 2024 11:16:33 +0000, Sebastian Ott wrote: > > CTR_EL0 is currently handled as an invariant register, thus > guests will be presented with the host value of that register. > Add emulation for CTR_EL0 and maintain a per vcpu value. The > only thing that is allowed to be changed compared to the host > value is to switch off the DIC bit which describes Icache > invalidation requirements. > > Signed-off-by: Sebastian Ott > --- > arch/arm64/kvm/sys_regs.c | 44 +++++++++++++++++++++++++++++++-------- > 1 file changed, 35 insertions(+), 9 deletions(-) > > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index 30253bd19917..b2019faa9d73 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -1871,10 +1871,42 @@ static bool access_ctr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, > if (p->is_write) > return write_to_read_only(vcpu, p, r); > > - p->regval = read_sanitised_ftr_reg(SYS_CTR_EL0); > + p->regval = __vcpu_sys_reg(vcpu, r->reg); > return true; > } > > +static u64 reset_ctr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd) > +{ > + u64 val = read_sanitised_ftr_reg(SYS_CTR_EL0); > + > + __vcpu_sys_reg(vcpu, rd->reg) = val; > + return __vcpu_sys_reg(vcpu, rd->reg); I really don't think we should make this a per-CPU value, and instead keep it a VM-wide value, just like any other ID register. Also, rd->reg isn't set to anything useful, leading to memory corruption (hint, there is no CTR_EL0 in the vcpu sysreg file). > +} > + > +static int get_ctr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, > + u64 *val) > +{ > + *val = __vcpu_sys_reg(vcpu, rd->reg); > + return 0; > +} > + > +static int set_ctr(struct kvm_vcpu *vcpu, const struct sys_reg_desc *rd, > + u64 val) > +{ > + u64 ctr_el0 = read_sanitised_ftr_reg(SYS_CTR_EL0); > + > + if (kvm_vm_has_ran_once(vcpu->kvm) && > + val != __vcpu_sys_reg(vcpu, rd->reg)) > + return -EBUSY; > + > + if (((ctr_el0 & ~CTR_EL0_DIC_MASK) != (val & ~CTR_EL0_DIC_MASK)) || > + ((ctr_el0 & CTR_EL0_DIC_MASK) < (val & CTR_EL0_DIC_MASK))) > + return -EINVAL; Why limit this to DIC only? Anything that advertises something "weaker" than what the HW has, such as a smaller cache line size, is equally valid. > + > + __vcpu_sys_reg(vcpu, rd->reg) = val; > + return 0; > +} > + > static bool access_clidr(struct kvm_vcpu *vcpu, struct sys_reg_params *p, > const struct sys_reg_desc *r) > { > @@ -2461,7 +2493,8 @@ static const struct sys_reg_desc sys_reg_descs[] = { > { SYS_DESC(SYS_CCSIDR2_EL1), undef_access }, > { SYS_DESC(SYS_SMIDR_EL1), undef_access }, > { SYS_DESC(SYS_CSSELR_EL1), access_csselr, reset_unknown, CSSELR_EL1 }, > - { SYS_DESC(SYS_CTR_EL0), access_ctr }, > + { SYS_DESC(SYS_CTR_EL0), access_ctr, .reset = reset_ctr, > + .get_user = get_ctr, .set_user = set_ctr}, Now, who traps this? Since c876c3f182a5 ("KVM: arm64: Relax trapping of CTR_EL0 when FEAT_EVT is available"), we don't trap it anymore when FEAT_EVT is present. Surely you should account for this. Also, we really shouldn't trap it unless the guest view is different, as this has a very visible impact on any userspace. M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel