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Tue, 29 Oct 2024 19:02:22 +0000 Date: Tue, 29 Oct 2024 19:02:22 +0000 Message-ID: <864j4u3f7l.wl-maz@kernel.org> From: Marc Zyngier To: Yu Zhao Cc: Andrew Morton , Catalin Marinas , Muchun Song , Thomas Gleixner , Will Deacon , Douglas Anderson , Mark Rutland , Nanyong Sun , linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org Subject: Re: [PATCH v1 3/6] irqchip/gic-v3: support SGI broadcast In-Reply-To: References: <20241021042218.746659-1-yuzhao@google.com> <20241021042218.746659-4-yuzhao@google.com> <86a5ew41tp.wl-maz@kernel.org> <86h6902m7y.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: yuzhao@google.com, akpm@linux-foundation.org, catalin.marinas@arm.com, muchun.song@linux.dev, tglx@linutronix.de, will@kernel.org, dianders@chromium.org, mark.rutland@arm.com, sunnanyong@huawei.com, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, linux-mm@kvack.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241029_120226_037485_3082F37C X-CRM114-Status: GOOD ( 25.65 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 25 Oct 2024 18:31:01 +0100, Yu Zhao wrote: >=20 > On Fri, Oct 25, 2024 at 10:15=E2=80=AFAM Marc Zyngier wr= ote: > > > > On Fri, 25 Oct 2024 06:07:45 +0100, > > Yu Zhao wrote: > > > > > > Hi Marc, > > > > > > On Tue, Oct 22, 2024 at 9:03=E2=80=AFAM Marc Zyngier = wrote: > > > > > > > > On Mon, 21 Oct 2024 05:22:15 +0100, > > > > Yu Zhao wrote: > > > > > > > > > > @@ -1407,6 +1418,13 @@ static void gic_ipi_send_mask(struct irq_d= ata *d, const struct cpumask *mask) > > > > > */ > > > > > dsb(ishst); > > > > > > > > > > + cpumask_copy(&broadcast, cpu_present_mask); > > > > > > > > Why cpu_present_mask? I'd expect that cpu_online_mask should be the > > > > correct mask to use -- we don't IPI offline CPUs, in general. > > > > > > This is exactly because "we don't IPI offline CPUs, in general", > > > assuming "we" means the kernel, not GIC. > > > > > > My interpretation of what the GIC spec says ("0b1: Interrupts routed > > > to all PEs in the system, excluding self") is that it broadcasts IPIs= to > > > "cpu_present_mask" (minus the local one). So if the kernel uses > > > "cpu_online_mask" here, GIC would send IPIs to offline CPUs > > > (cpu_present_mask ^ cpu_online_mask), which I don't know whether it's > > > a defined behavior. >=20 > Thanks for clarifying. >=20 > > Offline CPUs are not known to the kernel. >=20 > I assume it wouldn't matter to firmware either, correct? IOW, we Firmware is on the secure side of the stack. > wouldn't cause firmware any trouble by letting GIC send IPIs to > (cpu_present_mask ^ cpu_online_mask), assuming those two masks can be > different on arm64 when hotplug is enabled? You can't send SGIs from non-secure to secure using ICC_SGI1R_EL1. You would need to use ICC_ASGI1R_EL1, and have secure to allow such brokenness via a configuration of GICR_NSACR. Linux doesn't use the former, and no sane software touches the latter. M. --=20 Without deviation from the norm, progress is not possible.