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Sun, 21 Jun 2026 16:59:24 +0000 Date: Sun, 21 Jun 2026 17:59:23 +0100 Message-ID: <865x3bsuc4.wl-maz@kernel.org> From: Marc Zyngier To: Marek Vasut Cc: linux-pci@vger.kernel.org, Krzysztof =?UTF-8?B?V2lsY3p5xYRza2k=?= , Bjorn Helgaas , Catalin Marinas , Conor Dooley , Geert Uytterhoeven , Krzysztof Kozlowski , Lorenzo Pieralisi , Manivannan Sadhasivam , Rob Herring , Yoshihiro Shimoda , devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org Subject: Re: [PATCH v2 2/4] irqchip/gic-v3: Refactor GIC600 limited to 32bit PA erratum handling In-Reply-To: <20260618220427.14325-3-marek.vasut+renesas@mailbox.org> References: <20260618220427.14325-1-marek.vasut+renesas@mailbox.org> <20260618220427.14325-3-marek.vasut+renesas@mailbox.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: marek.vasut+renesas@mailbox.org, linux-pci@vger.kernel.org, kwilczynski@kernel.org, bhelgaas@google.com, catalin.marinas@arm.com, conor+dt@kernel.org, geert+renesas@glider.be, krzk+dt@kernel.org, lpieralisi@kernel.org, mani@kernel.org, robh@kernel.org, yoshihiro.shimoda.uh@renesas.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-doc@vger.kernel.org, linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 18 Jun 2026 23:02:00 +0100, Marek Vasut wrote: > > The GIC600 implementation is now known to be used on multiple 64-bit > SoCs, where it has address width for AXI or APB interface configured > to 32 bit, and it can access only the first 4GiB of physical address > space. > > Rework the handling of the quirk to work around this limitation such > that new entries can be added purely as new compatible strings, with > no need to add additional functions or new its_quirk array entries. > > Suggested-by: Marc Zyngier > Signed-off-by: Marek Vasut Acked-by: Marc Zyngier M. -- Without deviation from the norm, progress is not possible.