From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 86EEBC25B75 for ; Wed, 29 May 2024 14:45:26 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=9awutOA/Gphuy38wdCMVDnAE5SrXhFJUYvvvM/PECjU=; b=HL/2k2SM3HMS9M iNO0My6MvsivmwgkC7jX0jMP/OcriaN6H42LOQzAwz35C3Po57uN9V4wCjeiKOTGKsurjT4mT2+GJ vhjTp/i/vwJ6BSSD09IZ+nomUmkHO2PJ+5cib9dUchCiwuGd4br5AiGeePqgaQVdM2iTkkcAvwrKK qLN5BV5ZIOoniRAdomZ8DW3v/D+/f+V6sBTUbYPgadntwMiaCLaqb8voH0gDuxqlQvDF2WKx5oKIa Ru2s7OOmNVmcB9NfKir4GjYU9wnwwrCwVUhLxTBMgjHRA5wZT7Cj2JXdXa/QXD7zT9ub1idjA8Hb/ 1QU3mnpvjfJnm/l2srBg==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1sCKYE-00000004XOl-27OG; Wed, 29 May 2024 14:45:14 +0000 Received: from dfw.source.kernel.org ([139.178.84.217]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1sCKXt-00000004XAQ-24Qb for linux-arm-kernel@lists.infradead.org; Wed, 29 May 2024 14:44:54 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by dfw.source.kernel.org (Postfix) with ESMTP id DAAE060C16; Wed, 29 May 2024 14:44:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id ADD3CC2BD10; Wed, 29 May 2024 14:44:52 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1716993892; bh=IBwxOd5lJ8HVS/TkS0TxTcWs6CiVq5/atr1iw1kaySg=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=Yl15wPgrYOYI0RJDmFreWdaiCyh5ygtmidkptNwsvue1rQItu5Oln6HXp141ESjol rG/UTZxgv81b3YIfmubUVZAaWRDmimq7eX6fd5cj5M+F1b0qzxbzy/1vE8PcGs9iIU N5wjxwAzZjU1XCoDuDSvIYqOpH8MPD9AXgF0ABRnCJJswVu3BnLZhSNqQAVA0a7IGu yrFPSh3FSFrGz3YYD8hSZNH7yhg8NThW1dwR9Db9eBzNeSQSKZUZg0zGlSTIn4Xrl3 mdTJsMyeVFVWn+PuV0WuRErte3sTjtoza16cG2seSKKJLt6SqNJCEoIUOhD9ScBGSS yB4jR/os1pRXA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1sCKXq-00GeTX-JN; Wed, 29 May 2024 15:44:50 +0100 Date: Wed, 29 May 2024 15:44:50 +0100 Message-ID: <865xuwn0d9.wl-maz@kernel.org> From: Marc Zyngier To: Joey Gouly Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: Re: [PATCH 1/2] KVM: arm64: nv: Fix relative priorities of exceptions generated by ERETAx In-Reply-To: <20240529142727.GA1357631@e124191.cambridge.arm.com> References: <20240528100632.1831995-1-maz@kernel.org> <20240528100632.1831995-2-maz@kernel.org> <20240529142727.GA1357631@e124191.cambridge.arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: joey.gouly@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, kvm@vger.kernel.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240529_074453_655324_31A99831 X-CRM114-Status: GOOD ( 37.87 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Joey, On Wed, 29 May 2024 15:27:27 +0100, Joey Gouly wrote: > > Hi Marc, > > These references are from ARM DDI 0487 J.a. Ah, you have an upgrade pending! ;-) > > On Tue, May 28, 2024 at 11:06:31AM +0100, Marc Zyngier wrote: > > ERETAx can fail in multiple ways: > > > > (1) ELR_EL2 points lalaland > > (2) we get a PAC failure > > (3) SPSR_EL2 has the wrong mode > > > > (1) is easy, as we just let the CPU do its thing and deliver an > > Instruction Abort. However, (2) and (3) are interesting, because > > the PAC failure priority is way below that of the Illegal Execution > > State exception. > > > > Which means that if we have detected a PAC failure (and that we have > > FPACCOMBINE), we must be careful to give priority to the Illegal > > Execution State exception, should one be pending. > > This is IZFGJP Prioritization of Synchronous exceptions taken to > AArch64 state. > Indeed. > > > > Solving this involves hoisting the SPSR calculation earlier and > > testing for the IL bit before injecting the FPAC exception. > > > > In the extreme case of a ERETAx returning to an invalid mode *and* > > failing its PAC check, we end up with an Instruction Abort (due > > to the new PC being mangled by the failed Auth) *and* PSTATE.IL > > being set. Which matches the requirements of the architecture. > > And this is IGPPXQ, which says "which causes the next instruction to > generate an Illegal State exception. The exception return > instruction does not generate the exception." > > Which matches since Instruction Abort has a higher priority than > Illegal Exception. Spot on. Although it is a bit surprising that in all cases, the CPU has to attempt fetching the next instruction before delivering the IL exception so that it can prioritise the Abort. I guess it simplifies some HW implementations, but makes SW suffer a bit. > > > > > Whilst we're at it, remove a stale comment that states the obvious > > and only confuses the reader. > > > > Fixes: 213b3d1ea161 ("KVM: arm64: nv: Handle ERETA[AB] instructions") > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kvm/emulate-nested.c | 21 +++++++++++---------- > > 1 file changed, 11 insertions(+), 10 deletions(-) > > > > diff --git a/arch/arm64/kvm/emulate-nested.c b/arch/arm64/kvm/emulate-nested.c > > index 72d733c74a38..54090967a335 100644 > > --- a/arch/arm64/kvm/emulate-nested.c > > +++ b/arch/arm64/kvm/emulate-nested.c > > @@ -2181,16 +2181,23 @@ void kvm_emulate_nested_eret(struct kvm_vcpu *vcpu) > > if (forward_traps(vcpu, HCR_NV)) > > return; > > > > + spsr = vcpu_read_sys_reg(vcpu, SPSR_EL2); > > + spsr = kvm_check_illegal_exception_return(vcpu, spsr); > > + > > /* Check for an ERETAx */ > > esr = kvm_vcpu_get_esr(vcpu); > > if (esr_iss_is_eretax(esr) && !kvm_auth_eretax(vcpu, &elr)) { > > /* > > - * Oh no, ERETAx failed to authenticate. If we have > > - * FPACCOMBINE, deliver an exception right away. If we > > - * don't, then let the mangled ELR value trickle down the > > + * Oh no, ERETAx failed to authenticate. > > + * > > + * If we have FPACCOMBINE and we don't have a pending > > + * Illegal Execution State exception (which has priority > > + * over FPAC), deliver an exception right away. > > + * > > + * Otherwise, let the mangled ELR value trickle down the > > * ERET handling, and the guest will have a little surprise. > > */ > > - if (kvm_has_pauth(vcpu->kvm, FPACCOMBINE)) { > > + if (kvm_has_pauth(vcpu->kvm, FPACCOMBINE) && !(spsr & PSR_IL_BIT)) { > > esr &= ESR_ELx_ERET_ISS_ERETA; > > esr |= FIELD_PREP(ESR_ELx_EC_MASK, ESR_ELx_EC_FPAC); > > kvm_inject_nested_sync(vcpu, esr); > > @@ -2201,17 +2208,11 @@ void kvm_emulate_nested_eret(struct kvm_vcpu *vcpu) > > preempt_disable(); > > kvm_arch_vcpu_put(vcpu); > > > > - spsr = __vcpu_sys_reg(vcpu, SPSR_EL2); > > - spsr = kvm_check_illegal_exception_return(vcpu, spsr); > > if (!esr_iss_is_eretax(esr)) > > elr = __vcpu_sys_reg(vcpu, ELR_EL2); > > > > trace_kvm_nested_eret(vcpu, elr, spsr); > > > > - /* > > - * Note that the current exception level is always the virtual EL2, > > - * since we set HCR_EL2.NV bit only when entering the virtual EL2. > > - */ > > *vcpu_pc(vcpu) = elr; > > *vcpu_cpsr(vcpu) = spsr; > > > > Those references were just me checking it, not suggesting you edit > the commit message. Well, that's excellent detective work! > > Reviewed-by: Joey Gouly Thanks again, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel