From: Marc Zyngier <maz@kernel.org>
To: Vishnu Pajjuri <vishnu@os.amperecomputing.com>
Cc: Fuad Tabba <tabba@google.com>, Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oupton@kernel.org>,
Zenghui Yu <yuzenghui@huawei.com>,
Christoffer Dall <christoffer.dall@arm.com>,
Mark Brown <broonie@kernel.org>,
kvm@vger.kernel.org, linux-arm-kernel@lists.infradead.org,
kvmarm@lists.linux.dev
Subject: Re: [PATCH v4 35/49] KVM: arm64: GICv3: nv: Plug L1 LR sync into deactivation primitive
Date: Tue, 31 Mar 2026 10:42:57 +0100 [thread overview]
Message-ID: <86a4vo49ni.wl-maz@kernel.org> (raw)
In-Reply-To: <1e050b67-2276-41ad-9265-796ba853dc7c@os.amperecomputing.com>
On Tue, 31 Mar 2026 07:31:54 +0100,
Vishnu Pajjuri <vishnu@os.amperecomputing.com> wrote:
>
> Hi Marc,
> Many thanks for your reply.
>
> On 30-03-2026 17:47, Marc Zyngier wrote:
> > On Mon, 30 Mar 2026 12:51:51 +0100,
> > Vishnu Pajjuri <vishnu@os.amperecomputing.com> wrote:
> >>
> >> Hi Fuad Tabba,
> >
> > To be brutally honest, I doubt Fuad really cares about NV,
>
> I see Tested-by: fuad Tabba on this patch so tried to reach out him.
Rather than the author of the patch?
>
> >
> >> I'm trying to run nested VMs on Ampere platforms after this patch
> >> series(v6.19+) but nested VMs are not booting and triggering soft
> >> lockups on L0 and L0 hang. But just before this patch I could able to
> >> successfully boot the Nested VMs.
> >
> > So the host dies? There isn't much here that interacts with the host
> > at all. Worse case, the L1 dies by not making progress.
>
> Initially L1 become unresponsive then L0 becomes unresponsive, soft
> lockups and L0 hang.
I've never seen this in the past 6 months. Doesn't mean there is no
bug, but so far I haven't seen any of that.
[...]
> >> Were you able to boot Nested VMs successfully after v6.19+?
> >
> > I boot L3s every day.
>
> Do you mean L2s or L3s on top of L2s?
I'm running an L0 host, itself running L1 guests, themselves running
L2 guests, themselves running L3 guests. That's what "running L3s"
means.
> I running L1 and L2 using latest QEMU, do you use QEMU or kvmtool run
> L1 and L2 in your regression tests?
Both. And that really shouldn't matter.
>
>
> >
> >> LOG:
> >> [ 164.647367] Call trace:
> >> [ 164.647368] smp_call_function_many_cond+0x334/0x7a0 (P)
> >> [ 164.647372] smp_call_function_many+0x20/0x40
> >> [ 164.647374] kvm_make_all_cpus_request+0xec/0x1b8
> >> [ 164.647377] vgic_queue_irq_unlock+0x1c8/0x2c8
> >> [ 164.647380] kvm_vgic_inject_irq+0x194/0x1e0
> >> [ 164.647381] kvm_vm_ioctl_irq_line+0x170/0x400
> >> [ 164.647386] kvm_vm_ioctl+0x7b8/0xc88
> >> [ 164.647389] __arm64_sys_ioctl+0xb4/0x118
> >> [ 164.647393] invoke_syscall+0x6c/0x100
> >> [ 164.647397] el0_svc_common.constprop.0+0x48/0xf0
> >> [ 164.647398] do_el0_svc+0x24/0x38
> >> [ 164.647400] el0_svc+0x3c/0x170
> >> [ 164.647403] el0t_64_sync_handler+0xa0/0xe8
> >> [ 164.647405] el0t_64_sync+0x1b0/0x1b8
> >
> > This trace is about interrupt injection from userspace, not
> > deactivation of a HW interrupt.
> > None of that makes much sense.
>
> Although this behavior is puzzling, it matches the trace I typically
> observe on L0. After reverting the patch, I was able to boot L2 guests
> successfully.
Well, this patch fixes real bugs, so it isn't going anywhere.
The patch you are reverting addresses the deactivation of a HW
interrupt, which is likely to be a timer (that's the only one we
support). The stacktrace points to the userspace injection of an SPI.
If we need to broadcast IPI, that's because there is no other SPI
currently in flight. But if a CPU is not responding to the IPI, what
is it doing? How does this interact with the patch you are reverting?
Given that I don't know what you're running, how you are running it,
that I don't have access to whatever HW you are using, and that you
are providing no useful information that'd help me debug this, I will
leave it up to you to debug it and come back with a detailed analysis
of the problem.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2026-03-31 9:43 UTC|newest]
Thread overview: 61+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-11-20 17:24 [PATCH v4 00/49] KVM: arm64: Add LR overflow infrastructure (the final one, I swear!) Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 01/49] irqchip/gic: Add missing GICH_HCR control bits Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 02/49] irqchip/gic: Expose CPU interface VA to KVM Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 03/49] irqchip/apple-aic: Spit out ICH_MISR_EL2 value on spurious vGIC MI Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 04/49] KVM: arm64: Turn vgic-v3 errata traps into a patched-in constant Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 05/49] KVM: arm64: vgic-v3: Fix GICv3 trapping in protected mode Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 06/49] KVM: arm64: GICv3: Detect and work around the lack of ICV_DIR_EL1 trapping Marc Zyngier
2025-11-25 11:26 ` Suzuki K Poulose
2025-11-25 13:48 ` Marc Zyngier
2025-11-25 14:14 ` Suzuki K Poulose
2025-11-25 15:01 ` Marc Zyngier
2025-11-25 15:03 ` Suzuki K Poulose
2025-11-20 17:24 ` [PATCH v4 07/49] KVM: arm64: Repack struct vgic_irq fields Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 08/49] KVM: arm64: Add tracking of vgic_irq being present in a LR Marc Zyngier
2025-11-20 17:24 ` [PATCH v4 09/49] KVM: arm64: Add LR overflow handling documentation Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 10/49] KVM: arm64: GICv3: Drop LPI active state when folding LRs Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 11/49] KVM: arm64: GICv3: Preserve EOIcount on exit Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 12/49] KVM: arm64: GICv3: Decouple ICH_HCR_EL2 programming from LRs Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 13/49] KVM: arm64: GICv3: Extract LR folding primitive Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 14/49] KVM: arm64: GICv3: Extract LR computing primitive Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 15/49] KVM: arm64: GICv2: Preserve EOIcount on exit Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 16/49] KVM: arm64: GICv2: Decouple GICH_HCR programming from LRs being loaded Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 17/49] KVM: arm64: GICv2: Extract LR folding primitive Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 18/49] KVM: arm64: GICv2: Extract LR computing primitive Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 19/49] KVM: arm64: Compute vgic state irrespective of the number of interrupts Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 20/49] KVM: arm64: Eagerly save VMCR on exit Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 21/49] KVM: arm64: Revamp vgic maintenance interrupt configuration Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 22/49] KVM: arm64: Turn kvm_vgic_vcpu_enable() into kvm_vgic_vcpu_reset() Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 23/49] KVM: arm64: Make vgic_target_oracle() globally available Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 24/49] KVM: arm64: Invert ap_list sorting to push active interrupts out Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 25/49] KVM: arm64: Move undeliverable interrupts to the end of ap_list Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 26/49] KVM: arm64: Use MI to detect groups being enabled/disabled Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 27/49] KVM: arm64: GICv3: Handle LR overflow when EOImode==0 Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 28/49] KVM: arm64: GICv3: Handle deactivation via ICV_DIR_EL1 traps Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 29/49] KVM: arm64: GICv3: Add GICv2 SGI handling to deactivation primitive Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 30/49] KVM: arm64: GICv3: Set ICH_HCR_EL2.TDIR when interrupts overflow LR capacity Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 31/49] KVM: arm64: GICv3: Add SPI tracking to handle asymmetric deactivation Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 32/49] KVM: arm64: GICv3: Handle in-LR deactivation when possible Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 33/49] KVM: arm64: GICv3: Avoid broadcast kick on CPUs lacking TDIR Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 34/49] KVM: arm64: GICv3: nv: Resync LRs/VMCR/HCR early for better MI emulation Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 35/49] KVM: arm64: GICv3: nv: Plug L1 LR sync into deactivation primitive Marc Zyngier
2026-03-30 11:51 ` Vishnu Pajjuri
2026-03-30 12:17 ` Marc Zyngier
2026-03-31 6:31 ` Vishnu Pajjuri
2026-03-31 9:42 ` Marc Zyngier [this message]
2025-11-20 17:25 ` [PATCH v4 36/49] KVM: arm64: GICv3: Force exit to sync ICH_HCR_EL2.En Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 37/49] KVM: arm64: GICv2: Handle LR overflow when EOImode==0 Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 38/49] KVM: arm64: GICv2: Handle deactivation via GICV_DIR traps Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 39/49] KVM: arm64: GICv2: Always trap GICV_DIR register Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 40/49] KVM: arm64: selftests: gic_v3: Add irq group setting helper Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 41/49] KVM: arm64: selftests: gic_v3: Disable Group-0 interrupts by default Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 42/49] KVM: arm64: selftests: vgic_irq: Fix GUEST_ASSERT_IAR_EMPTY() helper Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 43/49] KVM: arm64: selftests: vgic_irq: Change configuration before enabling interrupt Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 44/49] KVM: arm64: selftests: vgic_irq: Exclude timer-controlled interrupts Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 45/49] KVM: arm64: selftests: vgic_irq: Remove LR-bound limitation Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 46/49] KVM: arm64: selftests: vgic_irq: Perform EOImode==1 deactivation in ack order Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 47/49] KVM: arm64: selftests: vgic_irq: Add asymmetric SPI deaectivation test Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 48/49] KVM: arm64: selftests: vgic_irq: Add Group-0 enable test Marc Zyngier
2025-11-20 17:25 ` [PATCH v4 49/49] KVM: arm64: selftests: vgic_irq: Add timer deactivation test Marc Zyngier
2025-11-21 14:15 ` [PATCH v4 00/49] KVM: arm64: Add LR overflow infrastructure (the final one, I swear!) Mark Brown
2025-11-24 22:44 ` Oliver Upton
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