From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-8.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_HELO_NONE,SPF_PASS,URIBL_BLOCKED,USER_AGENT_SANE_1 autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 0052ACA9ECF for ; Mon, 4 Nov 2019 03:25:41 +0000 (UTC) Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id C803621929 for ; Mon, 4 Nov 2019 03:25:40 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=lists.infradead.org header.i=@lists.infradead.org header.b="dXpXOUmZ" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org C803621929 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=hisilicon.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20170209; h=Sender: Content-Transfer-Encoding:Content-Type:Cc:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:MIME-Version:Date: Message-ID:From:References:To:Subject:Reply-To:Content-ID:Content-Description :Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=Sim59ge8ra7yCdAvtQAmOK5zidL9OyA3DnTqXS4/DVk=; b=dXpXOUmZ4Aw26b dWtcRU6D9vd+w757W3wuIvffvTGngbSQMPpbguCf1VXDrtxrC9Qq762dBvnd1mCjyH54h0lBVsWO0 alPGz7yfEjFSL83sZg9nYDR5OvKZ8zcqI9EKPplbADIKxzJI++D3sRykiN07ak3BtBoycs4ZVd6QN F8b8d2pJUYhnNeIUl72JfIfTxKInWMSLEt42TbuR9PY9TaMq4r0gBBUPb7ntes4GClAx3sqhw19Za b/wcfaAiFQ91y01zMCmMzkRL0oBmyhEn5GhXlKK9WRyZVUx8Quhy2KUIcfr0DIPL/SKgU/Vu6a6BN VK1yHEXh5y4YMp3Fy6ww==; Received: from localhost ([127.0.0.1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.92.3 #3 (Red Hat Linux)) id 1iRSzs-0005DJ-5o; Mon, 04 Nov 2019 03:25:40 +0000 Received: from szxga04-in.huawei.com ([45.249.212.190] helo=huawei.com) by bombadil.infradead.org with esmtps (Exim 4.92.3 #3 (Red Hat Linux)) id 1iRSzp-0005CF-Pg for linux-arm-kernel@lists.infradead.org; Mon, 04 Nov 2019 03:25:39 +0000 Received: from DGGEMS401-HUB.china.huawei.com (unknown [172.30.72.58]) by Forcepoint Email with ESMTP id B977F1D19BF22CD1FB52; Mon, 4 Nov 2019 11:25:30 +0800 (CST) Received: from [127.0.0.1] (10.74.221.148) by DGGEMS401-HUB.china.huawei.com (10.3.19.201) with Microsoft SMTP Server id 14.3.439.0; Mon, 4 Nov 2019 11:25:25 +0800 Subject: Re: [PATCH] arm64: perf: Simplify the ARMv8 PMUv3 event attributes To: Robin Murphy , Will Deacon References: <1572407177-48229-1-git-send-email-zhangshaokun@hisilicon.com> <20191031160804.GA28325@willie-the-truck> <20191101085319.GA3508@blommer> <20191101103616.GA2392@willie-the-truck> <20191101105557.GC2392@willie-the-truck> <7b1e730e-9083-75b9-f1bc-7d84c686c97c@arm.com> <181d59c8-6252-c01c-79a9-364158be7105@hisilicon.com> From: Shaokun Zhang Message-ID: <86a54047-10ba-1e11-511f-2f1166ea2999@hisilicon.com> Date: Mon, 4 Nov 2019 11:25:25 +0800 User-Agent: Mozilla/5.0 (Windows NT 6.1; WOW64; rv:45.0) Gecko/20100101 Thunderbird/45.1.1 MIME-Version: 1.0 In-Reply-To: <181d59c8-6252-c01c-79a9-364158be7105@hisilicon.com> X-Originating-IP: [10.74.221.148] X-CFilter-Loop: Reflected X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191103_192538_009625_5D9DD54E X-CRM114-Status: GOOD ( 16.06 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Rutland , linux-arm-kernel@lists.infradead.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+infradead-linux-arm-kernel=archiver.kernel.org@lists.infradead.org Hi Robin, Sorry for the noise, it works on both GCC 5.4 and 7.3 using Will's method. Thanks, Shaokun On 2019/11/4 10:02, Shaokun Zhang wrote: > Hi Robin, > > On 2019/11/1 19:11, Robin Murphy wrote: >> On 2019-11-01 10:55 am, Will Deacon wrote: >>> On Fri, Nov 01, 2019 at 10:54:21AM +0000, Robin Murphy wrote: >>>> On 2019-11-01 10:36 am, Will Deacon wrote: >>>>> On Fri, Nov 01, 2019 at 08:53:19AM +0000, Mark Rutland wrote: >>>>>> On Thu, Oct 31, 2019 at 04:08:04PM +0000, Will Deacon wrote: >>>>>>> On Wed, Oct 30, 2019 at 11:46:17AM +0800, Shaokun Zhang wrote: >>>>>>>> For each PMU event, there is a ARMV8_EVENT_ATTR(xx, XX) and >>>>>>>> &armv8_event_attr_xx.attr.attr. Let's redefine the ARMV8_EVENT_ATTR >>>>>>>> to simplify the armv8_pmuv3_event_attrs. >>>>>>>> >>>>>>>> Cc: Will Deacon >>>>>>>> Cc: Mark Rutland >>>>>>>> Signed-off-by: Shaokun Zhang >>>>>>>> --- >>>>>>>> arch/arm64/kernel/perf_event.c | 189 ++++++++++++++--------------------------- >>>>>>>> 1 file changed, 65 insertions(+), 124 deletions(-) >>>>>>>> >>>>>>>> diff --git a/arch/arm64/kernel/perf_event.c b/arch/arm64/kernel/perf_event.c >>>>>>>> index a0b4f1bca491..d0f084939bcf 100644 >>>>>>>> --- a/arch/arm64/kernel/perf_event.c >>>>>>>> +++ b/arch/arm64/kernel/perf_event.c >>>>>>>> @@ -159,132 +159,73 @@ armv8pmu_events_sysfs_show(struct device *dev, >>>>>>>> } >>>>>>> >>>>>>> [...] >>>>>>> >>>>>>>> + (&((struct perf_pmu_events_attr[]) { \ >>>>>>>> + { .attr = __ATTR(name, 0444, armv8pmu_events_sysfs_show, NULL), \ >>>>>>>> + .id = config, } \ >>>>>>>> + })[0].attr.attr) >>>>>>> >>>>>>> I don't get the need for the array here. Why can't you do: >>>>>>> >>>>>>> (&((struct perf_pmu_events_attr) { >>>>>>> .attr = ..., >>>>>>> .id = ..., >>>>>>> }).attr.attr) >>>>>> >>>>>> You need want &(obj.attr.attr) rather than &(obj).attr.attr, i.e. >>>>>> >>>>>> #define ARMV8_EVENT_ATTR(name, config) \ >>>>>> (&((struct perf_pmu_events_attr) { \ >>>>>> .attr = __ATTR(name, 0444, armv8pmu_events_sysfs_show, NULL), \ >>>>>> .id = config, \ >>>>>> }.attr.attr)) >>>>>> ... which compiles for me. >>>>> >>>>> Weird, the following compiles fine for me with both GCC and clang: >>>>> >>>>> #define ARMV8_EVENT_ATTR(name, config) \ >>>>> (&((struct perf_pmu_events_attr) { \ >>>>> .attr = __ATTR(name, 0444, armv8pmu_events_sysfs_show, NULL), \ >>>>> .id = config, \ >>>>> }).attr.attr) >>>> >>>> You know that the expressions are equivalent because unary "&" has lower >>>> precedence than ".", right? ;) >>> >>> Right, which is why it's weird that Shaokun claims that the version I posted >>> doesn't compile. I assume it didn't build for Mark either, hence his extra >>> brackets. >> >> Because different compilers have different ideas of whether "obj" is a valid thing to dereference at all, regardless of where you put parentheses. From what I remember, the array trick was the only way to convince older GCCs to treat the floating struct initialiser as an actual object definition. I guess newer versions are a bit more lenient. >> > > Thanks for your detailed explanations, sounds great! Both GCC 5.4 and 7.3 are > unhappy without the array trick. > > Thanks, > Shaokun > >> Robin. >> >> . >> _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel