From: Marc Zyngier <maz@kernel.org>
To: Colton Lewis <coltonlewis@google.com>
Cc: kvm@vger.kernel.org, linux@armlinux.org.uk,
catalin.marinas@arm.com, will@kernel.org, oliver.upton@linux.dev,
joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com,
mark.rutland@arm.com, pbonzini@redhat.com, shuah@kernel.org,
linux-arm-kernel@lists.infradead.org,
linux-kernel@vger.kernel.org, kvmarm@lists.linux.dev,
linux-kselftest@vger.kernel.org
Subject: Re: [RFC PATCH 1/4] perf: arm_pmuv3: Introduce module param to partition the PMU
Date: Wed, 29 Jan 2025 15:33:02 +0000 [thread overview]
Message-ID: <86bjvpvdn5.wl-maz@kernel.org> (raw)
In-Reply-To: <gsntbjvq382s.fsf@coltonlewis-kvm.c.googlers.com>
On Tue, 28 Jan 2025 22:08:27 +0000,
Colton Lewis <coltonlewis@google.com> wrote:
>
> >> + bitmap_set(cpu_pmu->cntr_mask, 0, pmcr_n);
> >> +
> >> + if (reserved_guest_counters > 0 && reserved_guest_counters < pmcr_n) {
> >> + cpu_pmu->hpmn = reserved_guest_counters;
> >> + cpu_pmu->partitioned = true;
>
> > Isn't this going to completely explode on a kernel running at EL1?
>
> Trying to access an EL2 register at EL1 can do that. I'll add the
> appropriate hypercalls.
But what about a guest that would get passed the magic parameter? I
think you want to prevent that too.
>
> > Also, how does it work in an asymmetric configuration where some CPUs
> > can satisfy the reservation, and some can't?
>
> The CPUs that can't read their own value of PMCR.N below what the
> attempted reservation is and so do not get partitioned. Nothing changes
> for that CPU if it can't meet the reservation.
That's not what I meant. The question really is:
- do we want the reservation to be the number of counters reserved for
the host
- or do we want it to be for the guest?
On symmetric systems, it doesn't matter. On broken big-little systems,
this changes everything (it has a direct impact on userspace's ability
to use the counters).
I think the design should reflect a decision on the above.
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2025-01-29 15:34 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-01-27 22:20 [RFC PATCH 0/4] PMU partitioning driver support Colton Lewis
2025-01-27 22:20 ` [RFC PATCH 1/4] perf: arm_pmuv3: Introduce module param to partition the PMU Colton Lewis
2025-01-28 9:27 ` Marc Zyngier
2025-01-28 22:08 ` Colton Lewis
2025-01-28 23:08 ` Colton Lewis
2025-01-29 15:33 ` Marc Zyngier [this message]
2025-01-29 21:27 ` Colton Lewis
2025-02-03 21:37 ` Colton Lewis
2025-01-28 15:25 ` Rob Herring
2025-01-28 22:27 ` Colton Lewis
2025-01-27 22:20 ` [RFC PATCH 2/4] KVM: arm64: Make guests see only counters they can access Colton Lewis
2025-01-27 22:20 ` [RFC PATCH 3/4] perf: arm_pmuv3: Generalize counter bitmasks Colton Lewis
2025-01-27 22:20 ` [RFC PATCH 4/4] perf: arm_pmuv3: Keep out of guest counter partition Colton Lewis
2025-01-28 15:55 ` Suzuki K Poulose
2025-01-28 22:30 ` Colton Lewis
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