Hi,

Am Mittwoch, 14. Oktober 2026, 09:20:46 Mitteleuropäische Sommerzeit schrieb 
Navid Ghahremani:
> Support the top CRM and low-speed peripheral clock controllers of the
> ZTE ZX279128S SoC. Implement custom reset controller ops mapping
> logical reset IDs to internal hardware register offsets, and provide
> CRM2 clock gating and reset controller support for PCIe.
> 
> Signed-off-by: Navid Ghahremani <ghahramani.navid@gmail.com>

The comments I sent for v1 still apply to v2 I think.

Please try to reuse the infrastructure in place for zx29. Ideally clk-
zx279128s.c should be just static data and a minimalistic _probe function that 
invokes zx_clk_common_probe().

The drivers/clk/zte code is upstream in linux-next already. The MFD and reset 
parts are still missing though.