From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D2D8FD5B170 for ; Mon, 15 Dec 2025 17:31:20 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Subject:Cc:To:From:Message-ID:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=7lHihmcnKL83K978VOUCkQvO/AKg73bPgc3GK2ONLf0=; b=peZ08M/5u2pTj3dE+A1WptOcu9 eyDjBvE008UvOukO/oD3UnFQH3S4CkQDreWECeiqj3F8zDvSjwQGk2/+7ireF7xykRoP/sJOd0Tjq i8f8SxNPfaoObDvVNebJ/IYHvpJSI7SQ8OGAQWyho9uT68tIKFHMxgyZkRonr9uzKH85jcGpHGwSt F3tm2TD4i3WvYPStHmu1y+DyPmVgI9xFz/1O9N15B4u3IrpqzOfqHHiNJbaxxEqnIapxnYqpSukVL Wdap5ms+VOkQiplRDDuxqTYkERDaPIYbSus4/gjKCCERVfFLiXuBETfO5XovBV1H3bP0A8g1EKLcp ShSj8CxA==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1vVCPf-000000044UO-3ZG0; Mon, 15 Dec 2025 17:31:11 +0000 Received: from sea.source.kernel.org ([2600:3c0a:e001:78e:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1vVCPb-000000044Tl-1Qfk for linux-arm-kernel@lists.infradead.org; Mon, 15 Dec 2025 17:31:10 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sea.source.kernel.org (Postfix) with ESMTP id 9903544065; Mon, 15 Dec 2025 17:31:06 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 6F472C4CEF5; Mon, 15 Dec 2025 17:31:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1765819866; bh=CDgKylR63POWPEhpxFHNAYDpTWbaXioHxhz6i5waNQk=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=PlvZskpJB5HmtfOsSairh3TDwcbUp7sS6W7GSMYIdIrt5d9UglpWnxEtEz0Tn8Y/N qocEIEife+VkIwPZ5X7j+XSxdFbSGgVo67RdGoPhmMUvu2tH4oTARvwvnSKeaxVgMz nrKJs4oTWkHxYcMDgcZD0858W+Clx1Ua7NFm6p20KNXY+s6N+A8UOobAg6zs5OC1EU YOkCbJ12xQJcPVxQI2/BegG2p8Gl6U2ZsMAkjU5693JqXceo9EmSv+p/RHpigBeVQ8 nD7IBnaDdNTB5l1DwtIVQg3tHaUleVtOJwUBnKJA1OBhH+Ao+4y4z8X+czDS9f9X8l ILAeEWEon/OZw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1vVCPY-0000000CqF0-1enL; Mon, 15 Dec 2025 17:31:04 +0000 Date: Mon, 15 Dec 2025 17:31:03 +0000 Message-ID: <86cy4fodns.wl-maz@kernel.org> From: Marc Zyngier To: Sascha Bischoff Cc: "linux-arm-kernel@lists.infradead.org" , "kvmarm@lists.linux.dev" , "kvm@vger.kernel.org" , nd , "oliver.upton@linux.dev" , Joey Gouly , Suzuki Poulose , "yuzenghui@huawei.com" , "peter.maydell@linaro.org" , "lpieralisi@kernel.org" , Timothy Hayes Subject: Re: [PATCH 10/32] KVM: arm64: gic-v5: Add emulation for ICC_IAFFID_EL1 accesses In-Reply-To: <20251212152215.675767-11-sascha.bischoff@arm.com> References: <20251212152215.675767-1-sascha.bischoff@arm.com> <20251212152215.675767-11-sascha.bischoff@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: Sascha.Bischoff@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, kvm@vger.kernel.org, nd@arm.com, oliver.upton@linux.dev, Joey.Gouly@arm.com, Suzuki.Poulose@arm.com, yuzenghui@huawei.com, peter.maydell@linaro.org, lpieralisi@kernel.org, Timothy.Hayes@arm.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20251215_093108_984960_58E27ADA X-CRM114-Status: GOOD ( 34.40 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 12 Dec 2025 15:22:38 +0000, Sascha Bischoff wrote: > > GICv5 doesn't include an ICV_IAFFIDR_EL1 or ICH_IAFFIDR_EL2 for > providing the IAFFID to the guest. A guest access to the > ICH_IAFFIDR_EL1 must therefore be trapped and emulated to avoid the nit: ICC_IAFFIDR_EL1. There is no ICH_*_EL1 register. > guest accessing the host's ICC_IAFFIDR_EL1. > > For GICv5, the VPE ID corresponds to the virtual IAFFID for the > purposes of specifying the affinity of virtual interrupts. The VPE ID > is the index into the VPE Table, which will be the same as the > vcpu->vcpu_id once the various GICv5 VM tables are introduced. At this > stage, said VM tables have yet to be introduced as they are not > required for PPI support. Moreover, the IAFFID should go largely > unused by any guest using just PPIs as they are not routable to a > different PE. That said, we still need to trap and emulate the guest's > accesses to avoid leaking host state into the guest. I think you can trim some of this. Just state that KVM makes the IAFFIDR, VPEID and vcpu_id the same thing, and that'll be good enough. > > The virtual IAFFID is provided to the guest when it reads > ICC_IAFFID_EL1 (which always traps back to the hypervisor). Writes are > rightly ignored. > > The trapping for the ICC_IAFFIDR_EL2 is always enabled when in a guest > context. This register doesn't exist either. > > Co-authored-by: Timothy Hayes > Signed-off-by: Timothy Hayes > Signed-off-by: Sascha Bischoff > --- > arch/arm64/kvm/config.c | 10 +++++++++- > arch/arm64/kvm/sys_regs.c | 19 +++++++++++++++++++ > 2 files changed, 28 insertions(+), 1 deletion(-) > > diff --git a/arch/arm64/kvm/config.c b/arch/arm64/kvm/config.c > index 57ef67f718113..cbdd8ac90f4d0 100644 > --- a/arch/arm64/kvm/config.c > +++ b/arch/arm64/kvm/config.c > @@ -1582,6 +1582,14 @@ static void __compute_hdfgwtr(struct kvm_vcpu *vcpu) > *vcpu_fgt(vcpu, HDFGWTR_EL2) |= HDFGWTR_EL2_MDSCR_EL1; > } > > +static void __compute_ich_hfgrtr(struct kvm_vcpu *vcpu) > +{ > + __compute_fgt(vcpu, ICH_HFGRTR_EL2); > + > + /* ICC_IAFFIDR_EL1 *always* needs to be trapped when running a guest */ > + *vcpu_fgt(vcpu, ICH_HFGRTR_EL2) &= ~ICH_HFGRTR_EL2_ICC_IAFFIDR_EL1; Slightly redundant when !GICv5 in the guest, but that's not really a problem. > +} > + > void kvm_vcpu_load_fgt(struct kvm_vcpu *vcpu) > { > if (!cpus_have_final_cap(ARM64_HAS_FGT)) > @@ -1607,7 +1615,7 @@ void kvm_vcpu_load_fgt(struct kvm_vcpu *vcpu) > if (!cpus_have_final_cap(ARM64_HAS_GICV5_CPUIF)) > return; > > - __compute_fgt(vcpu, ICH_HFGRTR_EL2); > + __compute_ich_hfgrtr(vcpu); > __compute_fgt(vcpu, ICH_HFGWTR_EL2); > __compute_fgt(vcpu, ICH_HFGITR_EL2); > } > diff --git a/arch/arm64/kvm/sys_regs.c b/arch/arm64/kvm/sys_regs.c > index fbbd7b6ff6507..31c08fd591d08 100644 > --- a/arch/arm64/kvm/sys_regs.c > +++ b/arch/arm64/kvm/sys_regs.c > @@ -681,6 +681,24 @@ static bool access_gic_dir(struct kvm_vcpu *vcpu, > return true; > } > > +static bool access_gicv5_iaffid(struct kvm_vcpu *vcpu, struct sys_reg_params *p, > + const struct sys_reg_desc *r) > +{ > + if (!vgic_is_v5(vcpu->kvm)) > + return undef_access(vcpu, p, r); Shouldn't this be readily handled by the FGU configuration in the absence of GICv5 in the guest? > + > + if (p->is_write) > + return ignore_write(vcpu, p); > + > + /* > + * For GICv5 VMs, the IAFFID value is the same as the VPE ID. The VPE ID > + * is the same as the VCPU's ID. > + */ > + p->regval = FIELD_PREP(ICC_IAFFIDR_EL1_IAFFID, vcpu->vcpu_id); > + > + return true; > +} > + > static bool trap_raz_wi(struct kvm_vcpu *vcpu, > struct sys_reg_params *p, > const struct sys_reg_desc *r) > @@ -3411,6 +3429,7 @@ static const struct sys_reg_desc sys_reg_descs[] = { > { SYS_DESC(SYS_ICC_AP1R1_EL1), undef_access }, > { SYS_DESC(SYS_ICC_AP1R2_EL1), undef_access }, > { SYS_DESC(SYS_ICC_AP1R3_EL1), undef_access }, > + { SYS_DESC(SYS_ICC_IAFFIDR_EL1), access_gicv5_iaffid }, > { SYS_DESC(SYS_ICC_DIR_EL1), access_gic_dir }, > { SYS_DESC(SYS_ICC_RPR_EL1), undef_access }, > { SYS_DESC(SYS_ICC_SGI1R_EL1), access_gic_sgi }, Thanks, M. -- Without deviation from the norm, progress is not possible.