From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 8DF70C4828F for ; Fri, 2 Feb 2024 15:10:49 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=bKFvAGtcoYQuc2mMQBwTPqeJCLeWTaxMlSsVt4QWioE=; b=hUg79MJFXFoVL0 ub9gH4uJcjFzIYZWOfi0IQG8bxXMdZNTZ/jqnu2u0mCS7TqZ1HGzrIUYjyeyD3uF7nAOH856nJyy4 OsmUZyHsx8uDxAqBsSL7diDiVTnqtkZ++VftMLzU+HdJf8Kbo0RYL5sq0v2MpgYHw+iBNvWF2tQRv YcB8TIO4ntkhmT9Jxh3AvHjTJ6KCLh4AVgyzUFf/kRDaLbyhjHCz+lvV6pSF2NVOPx7Rtnoa7O3oV oLbMc5tQyt2nsHEOVs6/O/5GxdYyjsc1v/Sy5KQZ+FAovJIyqVjirYdb8XXgESS6cimS1etGkbPea 97KS9JkJnIoUJbbIsIcQ==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.97.1 #2 (Red Hat Linux)) id 1rVvBa-0000000Bvc3-2BZY; Fri, 02 Feb 2024 15:10:34 +0000 Received: from sin.source.kernel.org ([2604:1380:40e1:4800::1]) by bombadil.infradead.org with esmtps (Exim 4.97.1 #2 (Red Hat Linux)) id 1rVvBX-0000000Bvb7-47So for linux-arm-kernel@lists.infradead.org; Fri, 02 Feb 2024 15:10:33 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by sin.source.kernel.org (Postfix) with ESMTP id 1DC7ECE2BAD; Fri, 2 Feb 2024 15:10:30 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id B3B99C433F1; Fri, 2 Feb 2024 15:10:28 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1706886628; bh=IW/Yc2a7VB3hLUfz3Yt/mAo65lmsVam+O+ooLzsf4ec=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=UyFnfNsCNblMnE/d5mhCuE4hSDZM90Ag3ChXc0s75EZaQO5JHJW+VGr3wrBjDrxVL m7N8njYzrEt3xMcWqQGmJhnV4JSDkOGY984KGPM3Lx/J1ayAieGMenzVZNRJgFWJif eeQUMIxQSOmUNYGI9iPNrwm3OIS72DinDRgGk+ypN5P5G+8LEMEWV91VcBto4pJfWA SnJWkEZz56CHlLXRi4UTsXew8e/NQyO/BCODR/gz4I6Q40wPqVb8aJ8gOHWbVkdO9t ncQ1C+EwDb5m7NkKwLScXAYTsEfN5ERCJElqwqZYf519VUdBG/Ld5eA8s+tlhv579X u8YkUpd6R8Jyw== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1rVvBS-00HIUe-FA; Fri, 02 Feb 2024 15:10:26 +0000 Date: Fri, 02 Feb 2024 15:10:26 +0000 Message-ID: <86cyte7vh9.wl-maz@kernel.org> From: Marc Zyngier To: Joey Gouly Cc: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, James Morse , Suzuki K Poulose , Oliver Upton , Zenghui Yu , Catalin Marinas , Will Deacon , Mark Brown Subject: Re: [PATCH v2 04/25] KVM: arm64: nv: Add sanitising to EL2 configuration registers In-Reply-To: <20240201145607.GH2284078@e124191.cambridge.arm.com> References: <20240130204533.693853-1-maz@kernel.org> <20240130204533.693853-5-maz@kernel.org> <20240201145607.GH2284078@e124191.cambridge.arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: joey.gouly@arm.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, james.morse@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, broonie@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240202_071032_398896_7CEA1495 X-CRM114-Status: GOOD ( 25.35 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 01 Feb 2024 14:56:07 +0000, Joey Gouly wrote: > > On Tue, Jan 30, 2024 at 08:45:11PM +0000, Marc Zyngier wrote: > > We can now start making use of our sanitising masks by setting them > > to values that depend on the guest's configuration. > > > > First up are VTTBR_EL2, VTCR_EL2, VMPIDR_EL2 and HCR_EL2. > > > > Signed-off-by: Marc Zyngier > > --- > > arch/arm64/kvm/nested.c | 56 ++++++++++++++++++++++++++++++++++++++++- > > 1 file changed, 55 insertions(+), 1 deletion(-) > > > > diff --git a/arch/arm64/kvm/nested.c b/arch/arm64/kvm/nested.c > > index c976cd4b8379..ee461e630527 100644 > > --- a/arch/arm64/kvm/nested.c > > +++ b/arch/arm64/kvm/nested.c > > @@ -181,7 +181,7 @@ u64 kvm_vcpu_sanitise_vncr_reg(const struct kvm_vcpu *vcpu, enum vcpu_sysreg sr) > > return v; > > } > > > > -static void __maybe_unused set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u64 res1) > > +static void set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u64 res1) > > { > > int i = sr - __VNCR_START__; > > > > @@ -191,6 +191,7 @@ static void __maybe_unused set_sysreg_masks(struct kvm *kvm, int sr, u64 res0, u > > > > int kvm_init_nv_sysregs(struct kvm *kvm) > > { > > + u64 res0, res1; > > int ret = 0; > > > > mutex_lock(&kvm->arch.config_lock); > > @@ -209,6 +210,59 @@ int kvm_init_nv_sysregs(struct kvm *kvm) > > kvm->arch.id_regs[i] = limit_nv_id_reg(IDX_IDREG(i), > > kvm->arch.id_regs[i]); > > > > + /* VTTBR_EL2 */ > > + res0 = res1 = 0; > > + if (!kvm_has_feat_enum(kvm, ID_AA64MMFR1_EL1, VMIDBits, 16)) > > + res0 |= GENMASK(63, 56); > > + set_sysreg_masks(kvm, VTTBR_EL2, res0, res1); > > + > > + /* VTCR_EL2 */ > > + res0 = GENMASK(63, 32) | GENMASK(30, 20); > > + res1 = BIT(31); > > + set_sysreg_masks(kvm, VTCR_EL2, res0, res1); > > + > > + /* VMPIDR_EL2 */ > > + res0 = GENMASK(63, 40) | GENMASK(30, 24); > > + res1 = BIT(31); > > + set_sysreg_masks(kvm, VMPIDR_EL2, res0, res1); > > + > > + /* HCR_EL2 */ > > + res0 = BIT(48); > > + res1 = HCR_RW; > > Just want to clarify this bit actually, this is restricting the (first level > only?) nested EL1 to run as AArch64? This is restricting it at all levels. The guest hypervisor will eventually write its own view of HCR_EL2.RW in the VNCR page, and if it has promised AArch32 to its own guest (at any level), it is in for a treat, because we will forcefully reset this bit to 1. > Should we be sanitising ID_AA64PFR0_EL1.EL1=0b0001? We already do. See limit_nv_id_reg() and how it constraints ID_AA64PFR0_EL1.ELx to 0b0001. Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel