From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id EF1B3CA0FED for ; Wed, 10 Sep 2025 08:28:13 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Subject:Cc:To:From:Message-ID:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=DCVa3i81ZchG7Ib3JAvDlBtbaMH5RHFq/BWwSvqdhVc=; b=nxiQcoKk3HWf+dpP33sYWXTFQd Bwzl/7H/QnjTJeRwEivzfssL64PEC9xMWGftiWIaoPqiJLgdlPclBde4IxXJSoQpjNj45QsycH7Lp +Rm1SsAk4XXQpJY79oSKf5ggWylT+m3KI3l3AbjCLexh3jr6av+MxuYb5OinhhImtqlSwXyigvqm8 GEyN3l3FK95VMZYVhhIcF5wndhqRfLIvvjdgvhaz3LtJ8SmcPzwlI4/5auuMs7cflFx00U7GhEODZ 0XeVDjYd6uNok7EQkae0o00oxOs2NrGvFKwEU1yTL5ssuvLEadejJIhU8wWsnJBLU2/ONtp1T2vCa KBKMAnag==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98.2 #2 (Red Hat Linux)) id 1uwGBU-0000000CvEx-3jyM; Wed, 10 Sep 2025 08:28:08 +0000 Received: from tor.source.kernel.org ([2600:3c04:e001:324:0:1991:8:25]) by bombadil.infradead.org with esmtps (Exim 4.98.2 #2 (Red Hat Linux)) id 1uwGBT-0000000CvEL-3U9q for linux-arm-kernel@lists.infradead.org; Wed, 10 Sep 2025 08:28:07 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 3ED9060244; Wed, 10 Sep 2025 08:28:07 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id D065AC4CEF0; Wed, 10 Sep 2025 08:28:06 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1757492886; bh=E35FXdvXarB6Ep6s0kvPworSUWLLMvPxnL261c+f2cA=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=VGs4blp2aBu69qQ0rtyjPL/vT8Af9zts4zjLQV7i3YqVnQ4HK6l18E5B6VJafI9gn ysomlTdVJg4P6FE2ylhzShmNXQWrKSkeiJlNrNICfY3EEz+s0bOulYMFchvTf9TfEa VvLAj0O/CRbL/F0xV8TJhUWJlZUpGDRPo7tDHFlIb/PKsIQ/RfGbNJPGRv1mEa2XVR OO9CEUWtrBahWwR1xJPfHy3SsZhgYWaMvL2HgJQYa2BNgUnZkHzIgNV9Y2rvxR70Wv eOKA1E7GQ6rWx7fJ39oszlkGDeSZl0PdQyqWVkDbx1eNgWWr2MFGoIh6lFlkv9HtDp Bahw/p0ZO4M/Q== Received: from [185.219.108.64] (helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.98.2) (envelope-from ) id 1uwGBQ-00000004xbP-0d9l; Wed, 10 Sep 2025 08:28:04 +0000 Date: Wed, 10 Sep 2025 09:28:03 +0100 Message-ID: <86ecsed84s.wl-maz@kernel.org> From: Marc Zyngier To: Thomas Gleixner , linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org Cc: Mark Rutland , Will Deacon , "Rafael J. Wysocki" , Rob Herring , Saravana Kannan , Greg Kroah-Hartman , Sven Peter , Janne Grunau , Suzuki K Poulose , James Clark Subject: Re: [PATCH 15/25] genirq: Allow per-cpu interrupt sharing for non-overlapping affinities In-Reply-To: <20250908163127.2462948-16-maz@kernel.org> References: <20250908163127.2462948-1-maz@kernel.org> <20250908163127.2462948-16-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: tglx@linutronix.de, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-acpi@vger.kernel.org, mark.rutland@arm.com, will@kernel.org, rafael@kernel.org, robh@kernel.org, saravanak@google.com, gregkh@linuxfoundation.org, sven@kernel.org, j@jannau.net, suzuki.poulose@arm.com, james.clark@linaro.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Mon, 08 Sep 2025 17:31:17 +0100, Marc Zyngier wrote: > > Interrupt sharing for percpu-devid interrupts is forbidden, and > for good reasons. These are interrupts generated *from* a CPU and > handled by itself (timer, for example). Nobody in their right mind > would put two devices on the same pin (and if they have, they get to > keep the pieces...). > > But this also prevents more benign cases, where devices are connected > to groups of CPUs, and for which the affinities are not overlapping. > Effectively, the only thing they share is the interrupt number, and > nothing else. > > Let's tweak the definition of IRQF_SHARED applied to percpu_devid > interrupts to allow this particular case. This results in extra > validation at the point of the interrupt being setup and freed, > as well as a tiny bit of extra complexity for interrupts at handling > time (to pick the correct irqaction). > > Signed-off-by: Marc Zyngier > --- > kernel/irq/chip.c | 8 ++++-- > kernel/irq/manage.c | 67 +++++++++++++++++++++++++++++++++++++-------- > 2 files changed, 61 insertions(+), 14 deletions(-) > > diff --git a/kernel/irq/chip.c b/kernel/irq/chip.c > index 0d0276378c707..af90dd440d5ee 100644 > --- a/kernel/irq/chip.c > +++ b/kernel/irq/chip.c > @@ -897,8 +897,9 @@ void handle_percpu_irq(struct irq_desc *desc) > void handle_percpu_devid_irq(struct irq_desc *desc) > { > struct irq_chip *chip = irq_desc_get_chip(desc); > - struct irqaction *action = desc->action; > unsigned int irq = irq_desc_get_irq(desc); > + unsigned int cpu = smp_processor_id(); > + struct irqaction *action; > irqreturn_t res; > > /* > @@ -910,12 +911,15 @@ void handle_percpu_devid_irq(struct irq_desc *desc) > if (chip->irq_ack) > chip->irq_ack(&desc->irq_data); > > + for (action = desc->action; action; action = action->next) > + if (cpumask_test_cpu(cpu, action->affinity)) > + break; > + > if (likely(action)) { > trace_irq_handler_entry(irq, action); > res = action->handler(irq, raw_cpu_ptr(action->percpu_dev_id)); > trace_irq_handler_exit(irq, action, res); > } else { > - unsigned int cpu = smp_processor_id(); > bool enabled = cpumask_test_cpu(cpu, desc->percpu_enabled); > > if (enabled) As Will points out off the list, the above lacks the a similar handling for percpu_devid NMIs, leading to NMIs that are only handled on the first affinity group. It's easy enough to move the above to common code and share it with handle_percpu_devid_fasteoi_nmi(), but at this point there is hardly any difference with handle_percpu_devid_irq(). Any objection to simply killing the NMI version? Thanks, M. -- Without deviation from the norm, progress is not possible.