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b=EpxIKBvTXu6P6iDxz7oVD4I6GbXeSkcHqARLqmeYlJO5zjKKmyh4DuY1v0kDwtGwc zHfbJnrf+LEVkX+jeRQhI1fQxIYy3aUexfTBb6vIKERTVhigHj3HIQwMNFzsXDvENb 7/ADSbncCqIion780Y3gIHRY20rUYISOWiqmhF3/3PhAR4qar3dgNt9ChSj7RVziZ8 0zNdAr+FlR1CY2X/sZEcP6UU7PZLtM1Y7IbvmTfxo81pRvKZOBszrvOyQNEifd1eL/ jvYvPstpwHIF/cX2pM6QpPhYURzKK4ZXBdTGVEl50Nmke12B/2uJ2xc9LS72Y8mNlu j+HMrtUVWxPDA== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1qS0Ar-002KST-5U; Fri, 04 Aug 2023 20:09:21 +0100 Date: Fri, 04 Aug 2023 20:09:20 +0100 Message-ID: <86edki62vz.wl-maz@kernel.org> From: Marc Zyngier To: James Clark Cc: coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Oliver Upton , James Morse , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Mike Leach , Leo Yan , Alexander Shishkin , Anshuman Khandual , Rob Herring , linux-kernel@vger.kernel.org Subject: Re: [RFC PATCH 0/3] coresight: Support exclude_guest with Feat_TRF and nVHE In-Reply-To: <20230804101317.460697-1-james.clark@arm.com> References: <20230804101317.460697-1-james.clark@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/28.2 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: james.clark@arm.com, coresight@lists.linaro.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, oliver.upton@linux.dev, james.morse@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, mike.leach@linaro.org, leo.yan@linaro.org, alexander.shishkin@linux.intel.com, anshuman.khandual@arm.com, robh@kernel.org, linux-kernel@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20230804_120925_486242_01207ADC X-CRM114-Status: GOOD ( 22.74 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 04 Aug 2023 11:13:10 +0100, James Clark wrote: > > Hi, > > I'm looking for help in testing this and for feedback on whether it's > useful to anyone. Testing it requires hardware that has Feat_TRF (v8.4) > but no TRBE. This is because TRBE usage is disabled in nVHE guests. > > I don't currently have any access to any hardware, and the FVP model > can only do self hosted trace using TRBE. > > Currently with nVHE you would always get trace from guests, and > filtering out isn't possible without this patchset. In comparison, with > VHE guests, they never generate guest trace without [1]. I think the > existence of trace rather than lack of could suggest that this change is > less useful than [1]. Also the restricted set of hardware that it works > on supports that too. It'd be nice to have some sort of feature parity, but it seems like a vanishingly small target of users having access to an ETM sink. > > Apart from compilation and checking that the exclude guest settings > are correctly programmed on guest switch, this is untested by me. I'll have a look at the series, but none of my HW fits in this description (my ARMv8.4+ boxes don't have any form of tracing). Thanks, M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel