From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 6DA70FA3740 for ; Mon, 31 Oct 2022 09:46:55 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To: Subject:Cc:To:From:Message-ID:Date:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=egiHicv8Ndr7moR7mN5kjEHvu9xaOJcuSVndzZrn18w=; b=fnGYf026ObohHX +9L3DP0uqioVFAnlrA+o5XPEkR7FY05pcqY4LscoHNIp62bnPcXLe2Pl6MM6hSkShQSce53JCnn4f uA091Bjf3lnH9UKZu2aLMar6zqEPtXRHngVS75fARFfJZHAIZ9g5hLAcO8kzDndywiLnAVg9LUjyB uodyaRBY3qs0uxyBigYfJCf6wQTlSgO8zL3mOtGy0IqHVdx7wjZsCcxQ9GvcL9a0zlcmEEPKF7IY0 3pNSvNC8gjbTGCRcjPUr9xHeI7IBki1tsFyW8zYqkBvfhqy/A8k4jZ3z3FzUnVTLeKSYc52booC/G ieU8kQXmag0+eswxWyDw==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1opRMk-00AEbv-LU; Mon, 31 Oct 2022 09:45:58 +0000 Received: from ams.source.kernel.org ([145.40.68.75]) by bombadil.infradead.org with esmtps (Exim 4.94.2 #2 (Red Hat Linux)) id 1opRMh-00AEYZ-Eg for linux-arm-kernel@lists.infradead.org; Mon, 31 Oct 2022 09:45:57 +0000 Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ams.source.kernel.org (Postfix) with ESMTPS id 81677B81232; Mon, 31 Oct 2022 09:45:52 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 2FCD6C433D6; Mon, 31 Oct 2022 09:45:51 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1667209551; bh=LK/UBCZW9JIG6iz1xVv7xLEZGFDVElgWNhFitHEZwhc=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=RqyDmRsfXN7eqvii05B4O7Ox6kMKO8cgSRBy3ae2p011u62OA05GbFs92zDE0UTwR ZR4G24FkWoDkueM+JoRjfJrEDhCeU1bNO4d/B4fbKVVTJm8yLdBHaStMX5VWsQ5NOe AsZjTw6+4AICbcT2Mtcac7XSh6Wa/rSyx2T31ulZ+uro4iU6duW+o8R4ZrW5ons54z D3DKqbQ5c1JC8jdkIss7pI0jYBr2TVcrLpIIIG14Q6Svc9KUWuXG94LNkSZ6R21pho T7CkRHFhu3apdbXFYNwxt9l0mHrH3jeG9gbBuT+J2SF/4nvh7bYWPZQgzp3gGW0DQr crlJchSCldk4Q== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1opRMa-002hgF-TC; Mon, 31 Oct 2022 09:45:48 +0000 Date: Mon, 31 Oct 2022 09:45:48 +0000 Message-ID: <86eduoe377.wl-maz@kernel.org> From: Marc Zyngier To: Mark Brown Cc: Catalin Marinas , Will Deacon , Peter Maydell , Richard Henderson , Vincent Donnefort , James Morse , Alexandru Elisei , Suzuki K Poulose , Oliver Upton , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, stable@vger.kernel.org Subject: Re: [PATCH v1 2/2] KVM: arm64: Trap access to SMPRI_EL1 in VHE mode In-Reply-To: <20221027210441.814061-3-broonie@kernel.org> References: <20221027210441.814061-1-broonie@kernel.org> <20221027210441.814061-3-broonie@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/27.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: broonie@kernel.org, catalin.marinas@arm.com, will@kernel.org, peter.maydell@linaro.org, richard.henderson@linaro.org, vdonnefort@google.com, james.morse@arm.com, alexandru.elisei@arm.com, suzuki.poulose@arm.com, oliver.upton@linux.dev, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, stable@vger.kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221031_024555_817966_43DD1A64 X-CRM114-Status: GOOD ( 27.96 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 27 Oct 2022 22:04:40 +0100, Mark Brown wrote: > > On systems with SME access to the SMPRI_EL1 priority management register is > controlled by the nSMPRI_EL1 fine grained trap. We manage this trap in nVHE > mode but do not do so when in VHE mode, add the required management. > > On systems which do not implement priority mapping not enabling this trap > will allow the guest to discover if the host support SME since the register > will be RES0 rather than UNDEF. On systems implementing priority mapping > the register could be used as a side channel by guests. > > Fixes: 861262ab8627 ("KVM: arm64: Handle SME host state when running guests") > Signed-off-by: Mark Brown > Cc: stable@vger.kernel.org > --- > arch/arm64/kvm/hyp/vhe/switch.c | 24 ++++++++++++++++++++++-- > 1 file changed, 22 insertions(+), 2 deletions(-) > > diff --git a/arch/arm64/kvm/hyp/vhe/switch.c b/arch/arm64/kvm/hyp/vhe/switch.c > index 7acb87eaa092..cae581e8dd56 100644 > --- a/arch/arm64/kvm/hyp/vhe/switch.c > +++ b/arch/arm64/kvm/hyp/vhe/switch.c > @@ -63,10 +63,20 @@ static void __activate_traps(struct kvm_vcpu *vcpu) > __activate_traps_fpsimd32(vcpu); > } > > - if (cpus_have_final_cap(ARM64_SME)) > + if (cpus_have_final_cap(ARM64_SME)) { > write_sysreg(read_sysreg(sctlr_el2) & ~SCTLR_ELx_ENTP2, > sctlr_el2); > > + /* > + * Disable access to SMPRI_EL1 - we don't need to control > + * nTPIDR2_EL0 in VHE mode. It really isn't obvious to me why this is the case. The pseudocode says for a 'MSR TPIDR2_EL0, ' (DDI0616 A.a p225): elsif PSTATE.EL == EL1 then if Halted() && HaveEL(EL3) && EDSCR.SDD == '1' && boolean IMPLEMENTATION_DEFINED "EL3 trap priority, when SDD == '1'" && SCR_EL3.EnTP2 == '0' then UNDEFINED; elsif EL2Enabled() && (!HaveEL(EL3) || SCR_EL3.FGTEn == '1') && HFGWTR_EL2.nTPIDR2_EL0 == '0' then AArch64.SystemAccessTrap(EL2, 0x18); elsif HaveEL(EL3) && SCR_EL3.EnTP2 == '0' then if Halted() && EDSCR.SDD == '1' then UNDEFINED; else AArch64.SystemAccessTrap(EL3, 0x18); else TPIDR2_EL0 = X[t, 64]; So when running at EL1, and short of clearing nTPIDR2_EL0, EL1 will have access to TPIDR2_EL0. What prevents that? The write to SCTLR_EL2.EnTP2 is also pretty dubious, and doesn't really cover the access to EL0 (think SCTLR_EL1.EnTP2=1 and HCR_EL2.{E2H,TGE}={1,0}, for example). M. -- Without deviation from the norm, progress is not possible. _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel