From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id 113B7C433FE for ; Mon, 14 Nov 2022 03:30:48 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender: Content-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post: List-Archive:List-Unsubscribe:List-Id:In-Reply-To:From:References:Cc:To: Subject:MIME-Version:Date:Message-ID:Reply-To:Content-ID:Content-Description: Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID: List-Owner; bh=RP+hj43HJT9X04c3/V547j55Pu4vc3AypzBn9wVG+Lw=; b=tO76Td3X96sqJH B/7JYo1/g5gkfNpqpqwfQaYRSgsRfmw0z8ZgO/z5sSWu2Lh6FCYD3KP06rvMrKP1KaKSpfmTrv+Gx 9Rx7ffkdsnGsihAfzcLJLRSu7Ms6zEmY6GsX3v+873aMAXKJG1KCsYgiKeIrH7KyWKN+bkEFodjp+ 0xFdoJZua4oW3qrfLxxEgqlFaR7jBXpSQhwOT3hhJdf33gLFRzr66QF1wW6V6XCZQ4cUVGpM6TE14 Da3VMmKd+UUEh7Il6z4LWXpMI5F9q/mGFDG9qtgiIYebXJpkLsJEYT7InsaUK9P7F+R3d6jx7JKBd Hfib3E9h85KbnigyNy6w==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ouQAL-00FjSs-4M; Mon, 14 Nov 2022 03:29:45 +0000 Received: from foss.arm.com ([217.140.110.172]) by bombadil.infradead.org with esmtp (Exim 4.94.2 #2 (Red Hat Linux)) id 1ouQAH-00FjLo-Fn; Mon, 14 Nov 2022 03:29:43 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id AC24B23A; Sun, 13 Nov 2022 19:29:30 -0800 (PST) Received: from [10.162.40.16] (unknown [10.162.40.16]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPSA id 76BB43F534; Sun, 13 Nov 2022 19:29:14 -0800 (PST) Message-ID: <86fbdc8c-0dcb-9b8f-d843-63460d8b1d6a@arm.com> Date: Mon, 14 Nov 2022 08:59:11 +0530 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.2.2 Subject: Re: [PATCH v5 2/2] arm64: support batched/deferred tlb shootdown during page reclamation Content-Language: en-US To: Yicong Yang , akpm@linux-foundation.org, linux-mm@kvack.org, linux-arm-kernel@lists.infradead.org, x86@kernel.org, catalin.marinas@arm.com, will@kernel.org, linux-doc@vger.kernel.org Cc: corbet@lwn.net, peterz@infradead.org, arnd@arndb.de, punit.agrawal@bytedance.com, linux-kernel@vger.kernel.org, darren@os.amperecomputing.com, yangyicong@hisilicon.com, huzhanyuan@oppo.com, lipeifeng@oppo.com, zhangshiming@oppo.com, guojian@oppo.com, realmz6@gmail.com, linux-mips@vger.kernel.org, openrisc@lists.librecores.org, linuxppc-dev@lists.ozlabs.org, linux-riscv@lists.infradead.org, linux-s390@vger.kernel.org, Barry Song <21cnbao@gmail.com>, wangkefeng.wang@huawei.com, xhao@linux.alibaba.com, prime.zeng@hisilicon.com, Barry Song , Nadav Amit , Mel Gorman References: <20221028081255.19157-1-yangyicong@huawei.com> <20221028081255.19157-3-yangyicong@huawei.com> From: Anshuman Khandual In-Reply-To: <20221028081255.19157-3-yangyicong@huawei.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20221113_192941_610375_4A9FC672 X-CRM114-Status: GOOD ( 12.46 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On 10/28/22 13:42, Yicong Yang wrote: > +static inline bool arch_tlbbatch_should_defer(struct mm_struct *mm) > +{ > + /* > + * TLB batched flush is proved to be beneficial for systems with large > + * number of CPUs, especially system with more than 8 CPUs. TLB shutdown > + * is cheap on small systems which may not need this feature. So use > + * a threshold for enabling this to avoid potential side effects on > + * these platforms. > + */ > + if (num_online_cpus() <= CONFIG_ARM64_NR_CPUS_FOR_BATCHED_TLB) > + return false; > + > +#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI > + if (unlikely(this_cpu_has_cap(ARM64_WORKAROUND_REPEAT_TLBI))) > + return false; > +#endif should_defer_flush() is immediately followed by set_tlb_ubc_flush_pending() which calls arch_tlbbatch_add_mm(), triggering the actual TLBI flush via __flush_tlb_page_nosync(). It should be okay to check capability with this_cpu_has_cap() as the entire call chain here is executed on the same cpu. But just wondering if cpus_have_const_cap() would be simpler, consistent, and also cost effective ? Regardless, a comment is needed before the #ifdef block explaining why it does not make sense to defer/batch when __tlbi()/__tlbi_user() implementation will execute 'dsb(ish)' between two TLBI instructions to workaround the errata. > + > + return true; > +} > + > +static inline void arch_tlbbatch_add_mm(struct arch_tlbflush_unmap_batch *batch, > + struct mm_struct *mm, > + unsigned long uaddr) > +{ > + __flush_tlb_page_nosync(mm, uaddr); > +} > + > +static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch) > +{ > + dsb(ish); > +} _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel