From: Marc Zyngier <maz@kernel.org>
To: Mark Brown <broonie@kernel.org>
Cc: Catalin Marinas <catalin.marinas@arm.com>,
Will Deacon <will@kernel.org>,
linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev
Subject: Re: [PATCH v1 1/3] arm64/sysreg: Add definition for ICC_NMIAR1_EL1
Date: Wed, 07 Dec 2022 11:17:02 +0000 [thread overview]
Message-ID: <86fsdrlaz5.wl-maz@kernel.org> (raw)
In-Reply-To: <20221206131144.115774-2-broonie@kernel.org>
On Tue, 06 Dec 2022 13:11:42 +0000,
Mark Brown <broonie@kernel.org> wrote:
>
> FEAT_NMI adds a new interrupt status register for NMIs, ICC_NMIAR1_EL1.
> Add the definition for this register as per IHI0069H.
>
> Signed-off-by: Mark Brown <broonie@kernel.org>
> ---
> arch/arm64/tools/sysreg | 5 +++++
> 1 file changed, 5 insertions(+)
>
> diff --git a/arch/arm64/tools/sysreg b/arch/arm64/tools/sysreg
> index 384757a7eda9..5d0d2498c635 100644
> --- a/arch/arm64/tools/sysreg
> +++ b/arch/arm64/tools/sysreg
> @@ -1078,3 +1078,8 @@ Field 23:16 LD
> Res0 15:8
> Field 7:0 LR
> EndSysreg
> +
> +Sysreg ICC_NMIAR1_EL1 3 0 12 9 5
> +Res0 63:24
> +Field 23:0 INTID
> +EndSysreg
This patch should stay with the GIC patch adding NMIs, really.
M.
--
Without deviation from the norm, progress is not possible.
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next prev parent reply other threads:[~2022-12-07 11:18 UTC|newest]
Thread overview: 11+ messages / expand[flat|nested] mbox.gz Atom feed top
2022-12-06 13:11 [PATCH v1 0/3] arm64/sysreg: ISR register conversions Mark Brown
2022-12-06 13:11 ` [PATCH v1 1/3] arm64/sysreg: Add definition for ICC_NMIAR1_EL1 Mark Brown
2022-12-07 11:17 ` Marc Zyngier [this message]
2022-12-07 14:39 ` Mark Brown
2022-12-07 15:08 ` Marc Zyngier
2022-12-07 18:16 ` Mark Brown
2022-12-07 18:33 ` Marc Zyngier
2022-12-06 13:11 ` [PATCH v1 2/3] arm64/sysreg: Add definition of ISR_EL1 Mark Brown
2022-12-07 11:17 ` Marc Zyngier
2022-12-06 13:11 ` [PATCH v1 3/3] KVM: arm64: Use symbolic definition for ISR_EL1.A Mark Brown
2022-12-07 11:18 ` Marc Zyngier
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