Re: [PATCH v2 05/45] KVM: arm64: GICv3: Detect and work around the lack of ICV_DIR_EL1 trapping

[Marc Zyngier <maz@kernel.org>]

On Thu, 13 Nov 2025 14:33:02 +0000,
Mark Brown <broonie@kernel.org> wrote:
> 
> [1  <text/plain; us-ascii (quoted-printable)>]
> On Sun, Nov 09, 2025 at 05:15:39PM +0000, Marc Zyngier wrote:
> > A long time ago, an unsuspecting architect forgot to add a trap
> > bit for ICV_DIR_EL1 in ICH_HCR_EL2. Which was unfortunate, but
> > what's a bit of spec between friends? Thankfully, this was fixed
> > in a later revision, and ARM "deprecates" the lack of trapping
> > ability.
> 
> I'm seeing a regression on i.MX8MP-EVK and Toradax AM625+Mallow boards
> (both 4xA53+GICv3) in protected mode only with a bunch of the KVM
> selftests, including the arch_timer one:
> 
> # selftests: kvm: arch_timer
> # Random seed: 0x6b8b4567
> # ==== Test Assertion Failure ====
> #   lib/arm64/processor.c:487: false
> #   pid=4469 tid=4473 errno=4 - Interrupted system call
> # ==== Test Assertion Failure ====
> #   lib/arm64/processor.c:487: false
> #   pid=4469 tid=4471 errno=4 - Interrupted system call
> # ==== Test Assertion Failure ====
> #   lib/arm64/processor.c:487: false
> #   pid=4469 tid=4472 errno=4 - Interrupted system call
> # ==== Test Assertion Failure ====
> #   lib/arm64/processor.c:487: false
> #   pid=4469 tid=4470 errno=4 - Interrupted system call
> #      1	0x0000000000414387: assert_on_unhandled_exception at processor.c:487
> #      2	0x000000000040727f: _vcpu_run at kvm_util.c:1699
> #      3	 (inlined by) vcpu_run at kvm_util.c:1710
> #      4	0x0000000000402b07: test_vcpu_run at arch_timer.c:55
> #      5	0x0000ffffb12f2f9b: ?? ??:0
> #      6	0x0000ffffb135e58b: ?? ??:0
> #      1	0x0000000000414387: assert_on_unhandled_exception at processor.c:487
> #      2	0x000000000040727f: _vcpu_run at kvm_util.c:1699
> #      3	 (inlined by) vcpu_run at kvm_util.c:1710
> #      4	0x0000000000402b07: test_vcpu_run at arch_timer.c:55
> #      5	0x0000ffffb12f2f9b: ?? ??:0
> #      6	0x0000ffffb135e58b: ?? ??:0
> #   Unexpected exception (vector:0x4, ec:0x0)
> #      1	0x0000000000414387: assert_on_unhandled_exception at processor.c:487
> #      2	0x000000000040727f: _vcpu_run at kvm_util.c:1699
> #      3	 (inlined by) vcpu_run at kvm_util.c:1710
> #      4	0x0000000000402b07: test_vcpu_run at arch_timer.c:55
> #      5	0x0000ffffb12f2f9b: ?? ??:0
> #      6	0x0000ffffb135e58b: ?? ??:0
> #      1	0x0000000000414387: assert_on_unhandled_exception at processor.c:487
> #      2	0x000000000040727f: _vcpu_run at kvm_util.c:1699
> #      3	 (inlined by) vcpu_run at kvm_util.c:1710
> #      4	0x0000000000402b07: test_vcpu_run at arch_timer.c:55
> #      5	0x0000ffffb12f2f9b: ?? ??:0
> #      6	0x0000ffffb135e58b: ?? ??:0
> not ok 28 selftests: kvm: arch_timer # exit=254
> 
> The arch_timer case bisects to this patch in -next, regular nVHE mode
> runs this test happily.

My hunch is that we're missing something like the hack below, but I
haven't tried it yet.

I'll probably get to it tomorrow.

	M.

diff --git a/arch/arm64/kvm/hyp/nvhe/sys_regs.c b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
index 82da9b03692d4..3108b5185c204 100644
--- a/arch/arm64/kvm/hyp/nvhe/sys_regs.c
+++ b/arch/arm64/kvm/hyp/nvhe/sys_regs.c
@@ -444,6 +444,8 @@ static const struct sys_reg_desc pvm_sys_reg_descs[] = {
 
 	/* Scalable Vector Registers are restricted. */
 
+	HOST_HANDLED(SYS_ICC_PMR_EL1),
+
 	RAZ_WI(SYS_ERRIDR_EL1),
 	RAZ_WI(SYS_ERRSELR_EL1),
 	RAZ_WI(SYS_ERXFR_EL1),
@@ -457,9 +459,12 @@ static const struct sys_reg_desc pvm_sys_reg_descs[] = {
 
 	/* Limited Ordering Regions Registers are restricted. */
 
+	HOST_HANDLED(SYS_ICC_DIR_EL1),
+	HOST_HANDLED(SYS_ICC_RPR_EL1),
 	HOST_HANDLED(SYS_ICC_SGI1R_EL1),
 	HOST_HANDLED(SYS_ICC_ASGI1R_EL1),
 	HOST_HANDLED(SYS_ICC_SGI0R_EL1),
+	HOST_HANDLED(SYS_ICC_CTLR_EL1),
 	{ SYS_DESC(SYS_ICC_SRE_EL1), .access = pvm_gic_read_sre, },
 
 	HOST_HANDLED(SYS_CCSIDR_EL1),

-- 
Without deviation from the norm, progress is not possible.