From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org Received: from bombadil.infradead.org (bombadil.infradead.org [198.137.202.133]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.lore.kernel.org (Postfix) with ESMTPS id D6C63C35FFA for ; Wed, 19 Mar 2025 18:41:38 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=lists.infradead.org; s=bombadil.20210309; h=Sender:List-Subscribe:List-Help :List-Post:List-Archive:List-Unsubscribe:List-Id:Content-Type:MIME-Version: References:In-Reply-To:Subject:Cc:To:From:Message-ID:Date:Reply-To: Content-Transfer-Encoding:Content-ID:Content-Description:Resent-Date: Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:List-Owner; bh=d/iho82c/kOAISY+k8XGBmfYyPY8Eih6REIVbJGut5U=; b=v73Kz60EZ4o9hUKIef4HaMYD8N qJqQ5XIE4yd76DWlOG4xAMfrIQwFWQuHkxDhVSq/GLEUqvz3GuvgdNAySNFlU4HsNYsBCQiN/ZaLJ bljZzzfQEh+ROR/7AgiQtVDrDZA00mEcupkO6PfB7WUBLWb7znKEbyp+Hcx3ixreLv/4mefx7R264 OsRUKWz4f4hMHcXz5kt/aUWVIuMEBaSL8TcaRIrW9GyaZFis08A2lgtEpVuHzd9xz3BpVocq1Z4yQ 2Eyd8YYhI/ZCVMHrN4vKre+/Zhp+3lUi+YNbODc/ZNKPEKxRSO6NzLpP0g56X086jilffyLRhXDO2 PAYYRt8A==; Received: from localhost ([::1] helo=bombadil.infradead.org) by bombadil.infradead.org with esmtp (Exim 4.98 #2 (Red Hat Linux)) id 1tuyM5-00000009raa-1Ms6; Wed, 19 Mar 2025 18:41:29 +0000 Received: from tor.source.kernel.org ([172.105.4.254]) by bombadil.infradead.org with esmtps (Exim 4.98 #2 (Red Hat Linux)) id 1tuyJO-00000009rKU-2bVQ for linux-arm-kernel@lists.infradead.org; Wed, 19 Mar 2025 18:38:42 +0000 Received: from smtp.kernel.org (transwarp.subspace.kernel.org [100.75.92.58]) by tor.source.kernel.org (Postfix) with ESMTP id 7CE7E6814E; Wed, 19 Mar 2025 18:38:40 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 8B2F4C4CEE4; Wed, 19 Mar 2025 18:38:41 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1742409521; bh=xxc1VsGnvFXqzw9zxTVKLq0ZNRg09z107d4U6coGVOE=; h=Date:From:To:Cc:Subject:In-Reply-To:References:From; b=cP/s+lF8HISnXacs9ZPUuzigjGTgQ1p+XwdHZHgTAzH9gt3CJUABlgR426eWV4Yw7 KJKH+LG8vUAJzLDYQwCrwRVFrTKjKN/JEcKYuQc8QXtvu7+VOIt72ic+2ePQk/LDr+ dm9AyCDaRdkqQ9AGemNrE/VEawK3KZP+cePFOGWAj7X7eHUhDJtggVFg4Qzy032X4C pzVMtAtk/EOpX/RWukuuvzZt3LCXbpRrcbd9lN5PfqxIuoLTdFG6tAGSWcG7gTkyCA e/DAavfGqxgVV1Jxx49/u0qrgU/izRFICLPc5KCtRq9DE5SSF1lDrqBUYFVQYPjiIK Yd+Rj4Zu08Dww== Received: from sofa.misterjones.org ([185.219.108.64] helo=goblin-girl.misterjones.org) by disco-boy.misterjones.org with esmtpsa (TLS1.3) tls TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384 (Exim 4.95) (envelope-from ) id 1tuyJL-00FBqr-6X; Wed, 19 Mar 2025 18:38:39 +0000 Date: Wed, 19 Mar 2025 18:38:38 +0000 Message-ID: <86ldt0n9w1.wl-maz@kernel.org> From: Marc Zyngier To: Akihiko Odaki Cc: Oliver Upton , Joey Gouly , Suzuki K Poulose , Zenghui Yu , Catalin Marinas , Will Deacon , Kees Cook , "Gustavo A. R. Silva" , linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org, devel@daynix.com Subject: Re: [PATCH RFC] KVM: arm64: PMU: Use multiple host PMUs In-Reply-To: References: <20250319-hybrid-v1-1-4d1ada10e705@daynix.com> <86plidmjwh.wl-maz@kernel.org> <86o6xxmg87.wl-maz@kernel.org> <86msdhmemw.wl-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: akihiko.odaki@daynix.com, oliver.upton@linux.dev, joey.gouly@arm.com, suzuki.poulose@arm.com, yuzenghui@huawei.com, catalin.marinas@arm.com, will@kernel.org, kees@kernel.org, gustavoars@kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, linux-kernel@vger.kernel.org, linux-hardening@vger.kernel.org, devel@daynix.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Wed, 19 Mar 2025 11:51:21 +0000, Akihiko Odaki wrote: > > On 2025/03/19 20:41, Marc Zyngier wrote: > > On Wed, 19 Mar 2025 11:26:18 +0000, > > Akihiko Odaki wrote: > >> > >> On 2025/03/19 20:07, Marc Zyngier wrote: > >>> On Wed, 19 Mar 2025 10:26:57 +0000, > >>>> > >>> But that'd be a new ABI, which again would require buy-in from > >>> userspace. Maybe there is scope for an all CPUs, cycle-counter only > >>> PMUv3 exposed to the guest, but that cannot be set automatically, as > >>> we would otherwise regress existing setups. > >>> > >>> At this stage, and given that you need to change userspace, I'm not > >>> sure what the best course of action is. > >> > >> Having an explicit flag for the userspace is fine for QEMU, which I > >> care. It can flip the flag if and only if threads are not pinned to > >> one PMU and the machine is a new setup. > >> > >> I also wonder what regression you think setting it automatically causes. > > > > The current behaviour is that if you don't specify anything other than > > creating a PMUv3 (without KVM_ARM_VCPU_PMU_V3_SET_PMU), you get *some* > > PMU, and userspace is responsible for running the vcpu on CPUs that > > will implement that PMU. When if does, all the counters, all the > > events are valid. If it doesn't, nothing counts, but the > > counters/events are still valid. > > > > If you now add this flag automatically, the guest doesn't see the full > > PMU anymore. Only the cycle counter. That's the regression. > > What about setting the flag automatically when a user fails to pin > vCPUs to CPUs that are covered by one PMU? There would be no change if > a user correctly pins vCPUs as it is. Otherwise, they will see a > correct feature set advertised to the guest and the cycle counter > working. How do you know that the affinity is "correct"? VCPU affinity can be changed at any time. I, for one, do not want my VMs to change behaviour because I let the vcpus bounce around as the scheduler sees fit. Honestly, this is not a can of worm I want to open. We already have a pretty terrible userspace API for the PMU, let's not add to the confusion. *If* we are going down the road of presenting a dumbed-down PMU to the guest, it has to be an explicit buy-in from userspace. M. -- Without deviation from the norm, progress is not possible.