From: Marc Zyngier <maz@kernel.org>
To: kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org,
kvm@vger.kernel.org
Cc: Joey Gouly <joey.gouly@arm.com>,
Suzuki K Poulose <suzuki.poulose@arm.com>,
Oliver Upton <oliver.upton@linux.dev>,
Zenghui Yu <yuzenghui@huawei.com>,
Andre Przywara <andre.przywara@arm.com>,
Eric Auger <eauger@redhat.com>,
Ganapatrao Kulkarni <gankulkarni@os.amperecomputing.com>
Subject: Re: [PATCH 11/16] KVM: arm64: nv: Add Maintenance Interrupt emulation
Date: Tue, 17 Dec 2024 17:38:25 +0000 [thread overview]
Message-ID: <86ldweqkfi.wl-maz@kernel.org> (raw)
In-Reply-To: <20241217151331.934077-12-maz@kernel.org>
On Tue, 17 Dec 2024 15:13:26 +0000,
Marc Zyngier <maz@kernel.org> wrote:
>
> Emulating the vGIC means emulating the dreaded Maintenance Interrupt.
>
> This is a two-pronged problem:
>
> - while running L2, getting an MI translates into an MI injected
> in the L1 based on the state of the HW.
>
> - while running L1, we must accurately reflect the state of the
> MI line, based on the in-memory state.
>
> The MI INTID is added to the distributor, as expected on any
> virtualisation-capable implementation, and further patches
> will allow its configuration.
>
> Signed-off-by: Marc Zyngier <maz@kernel.org>
> ---
> arch/arm64/kvm/arm.c | 6 ++++
> arch/arm64/kvm/vgic/vgic-init.c | 22 ++++++++++++++
> arch/arm64/kvm/vgic/vgic-v3-nested.c | 45 ++++++++++++++++++++++++++++
> arch/arm64/kvm/vgic/vgic.c | 9 ++++++
> arch/arm64/kvm/vgic/vgic.h | 2 ++
> include/kvm/arm_vgic.h | 4 +++
> 6 files changed, 88 insertions(+)
>
> diff --git a/arch/arm64/kvm/arm.c b/arch/arm64/kvm/arm.c
> index 5e353b2c225b4..756cc4e74e10f 100644
> --- a/arch/arm64/kvm/arm.c
> +++ b/arch/arm64/kvm/arm.c
> @@ -824,6 +824,12 @@ int kvm_arch_vcpu_run_pid_change(struct kvm_vcpu *vcpu)
> if (ret)
> return ret;
>
> + if (vcpu_has_nv(vcpu)) {
> + ret = kvm_vgic_vcpu_nv_init(vcpu);
> + if (ret)
> + return ret;
> + }
> +
> /*
> * This needs to happen after any restriction has been applied
> * to the feature set.
> diff --git a/arch/arm64/kvm/vgic/vgic-init.c b/arch/arm64/kvm/vgic/vgic-init.c
> index bc7e22ab5d812..d2724315a70e9 100644
> --- a/arch/arm64/kvm/vgic/vgic-init.c
> +++ b/arch/arm64/kvm/vgic/vgic-init.c
> @@ -180,6 +180,20 @@ static int kvm_vgic_dist_init(struct kvm *kvm, unsigned int nr_spis)
> return 0;
> }
>
> +int kvm_vgic_vcpu_nv_init(struct kvm_vcpu *vcpu)
> +{
> + int ret;
> +
> + guard(mutex)(&vcpu->kvm->arch.config_lock);
> +
> + /* Cope with vintage userspace. Maybe we should fail instead */
> + if (vcpu->kvm->arch.vgic.maint_irq == 0)
> + vcpu->kvm->arch.vgic.maint_irq = kvm_vgic_global_state.maint_irq;
Well, that didn't take too long, and Joey did hit a bug here. Although
the two fields have the same name, they represent something totally
different:
- kvm_vgic_global_state.maint_irq is the interrupt number Linux uses
for the host. It's just a number, without any signification other
than for the kernel's own stuff.
- vcpu->kvm->arch.vgic.maint_irq is an GIC INTID. Really not the same
thing as the above.
What this should read is something like:
diff --git a/arch/arm64/kvm/vgic/vgic-init.c b/arch/arm64/kvm/vgic/vgic-init.c
index d2724315a70e9..8d92b05639588 100644
--- a/arch/arm64/kvm/vgic/vgic-init.c
+++ b/arch/arm64/kvm/vgic/vgic-init.c
@@ -188,7 +188,7 @@ int kvm_vgic_vcpu_nv_init(struct kvm_vcpu *vcpu)
/* Cope with vintage userspace. Maybe we should fail instead */
if (vcpu->kvm->arch.vgic.maint_irq == 0)
- vcpu->kvm->arch.vgic.maint_irq = kvm_vgic_global_state.maint_irq;
+ vcpu->kvm->arch.vgic.maint_irq = irq_get_irq_data(kvm_vgic_global_state.maint_irq)->hwirq;
ret = kvm_vgic_set_owner(vcpu, vcpu->kvm->arch.vgic.maint_irq, vcpu);
return ret;
So I guess there are two things that need to happen:
- rename vcpu->kvm->arch.vgic.maint_irq to something like "mi_intid"
- make the damn thing fail, as the comment suggests. We don't have any
legacy worth speaking of anyway.
Another thing is that Joey (who really didn't waste any time finding
issues) pointed out that we happily allow NV without GICv3. Clearly,
this should also be prevented.
Thanks Joey!
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2024-12-17 17:43 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2024-12-17 15:13 [PATCH 00/16] KVM: arm64: Add NV GICv3 support Marc Zyngier
2024-12-17 15:13 ` [PATCH 01/16] arm64: sysreg: Add layout for ICH_HCR_EL2 Marc Zyngier
2024-12-17 15:13 ` [PATCH 02/16] arm64: sysreg: Add layout for ICH_VTR_EL2 Marc Zyngier
2024-12-17 15:13 ` [PATCH 03/16] arm64: sysreg: Add layout for ICH_MISR_EL2 Marc Zyngier
2024-12-17 15:13 ` [PATCH 04/16] KVM: arm64: Move host SVE/SME state flags out of vCPU Marc Zyngier
2024-12-17 15:13 ` [PATCH 05/16] KVM: arm64: nv: Load timer before the GIC Marc Zyngier
2024-12-17 15:13 ` [PATCH 06/16] KVM: arm64: nv: Add ICH_*_EL2 registers to vpcu_sysreg Marc Zyngier
2024-12-17 15:13 ` [PATCH 07/16] KVM: arm64: nv: Plumb handling of GICv3 EL2 accesses Marc Zyngier
2024-12-17 15:13 ` [PATCH 08/16] KVM: arm64: nv: Sanitise ICH_HCR_EL2 accesses Marc Zyngier
2024-12-17 15:13 ` [PATCH 09/16] KVM: arm64: nv: Nested GICv3 emulation Marc Zyngier
2024-12-17 15:13 ` [PATCH 10/16] KVM: arm64: nv: Handle L2->L1 transition on interrupt injection Marc Zyngier
2024-12-17 15:13 ` [PATCH 11/16] KVM: arm64: nv: Add Maintenance Interrupt emulation Marc Zyngier
2024-12-17 17:38 ` Marc Zyngier [this message]
2024-12-17 15:13 ` [PATCH 12/16] KVM: arm64: nv: Respect virtual HCR_EL2.TWx setting Marc Zyngier
2024-12-17 15:13 ` [PATCH 13/16] KVM: arm64: nv: Request vPE doorbell upon nested ERET to L2 Marc Zyngier
2024-12-17 15:13 ` [PATCH 14/16] KVM: arm64: nv: Propagate used_lrs between L1 and L0 contexts Marc Zyngier
2024-12-17 15:13 ` [PATCH 15/16] KVM: arm64: nv: Fold GICv3 host trapping requirements into guest setup Marc Zyngier
2024-12-17 15:13 ` [PATCH 16/16] KVM: arm64: nv: Allow userland to set VGIC maintenance IRQ Marc Zyngier
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