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Thu, 17 Oct 2024 12:54:10 +0100 Date: Thu, 17 Oct 2024 12:54:09 +0100 Message-ID: <86msj33py6.wl-maz@kernel.org> From: Marc Zyngier To: Joey Gouly Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, anshuman.khandual@arm.com, james.morse@arm.com, Oliver Upton , Suzuki K Poulose , Zenghui Yu , Jing Zhang , Shameerali Kolothum Thodi , Catalin Marinas , Will Deacon Subject: Re: [PATCH v5 4/7] KVM: arm64: Fix missing traps of guest accesses to the MPAM registers In-Reply-To: <20241015133923.3910916-5-joey.gouly@arm.com> References: <20241015133923.3910916-1-joey.gouly@arm.com> <20241015133923.3910916-5-joey.gouly@arm.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: joey.gouly@arm.com, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, anshuman.khandual@arm.com, james.morse@arm.com, oliver.upton@linux.dev, suzuki.poulose@arm.com, yuzenghui@huawei.com, jingzhangos@google.com, shameerali.kolothum.thodi@huawei.com, catalin.marinas@arm.com, will@kernel.org X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20241017_045414_081632_11946CDE X-CRM114-Status: GOOD ( 15.34 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Tue, 15 Oct 2024 14:39:20 +0100, Joey Gouly wrote: > > @@ -204,6 +205,35 @@ static inline void __deactivate_traps_hfgxtr(struct kvm_vcpu *vcpu) > __deactivate_fgt(hctxt, vcpu, kvm, HAFGRTR_EL2); > } > > +static inline void __activate_traps_mpam(struct kvm_vcpu *vcpu) > +{ > + u64 r = MPAM2_EL2_TRAPMPAM0EL1 | MPAM2_EL2_TRAPMPAM1EL1; > + > + if (!cpus_support_mpam()) > + return; > + > + /* trap guest access to MPAMIDR_EL1 */ > + if (mpam_cpus_have_mpam_hcr()) { > + write_sysreg_s(MPAMHCR_EL2_TRAP_MPAMIDR_EL1, SYS_MPAMHCR_EL2); > + } else { > + /* From v1.1 TIDR can trap MPAMIDR, set it unconditionally */ > + r |= MPAM2_EL2_TIDR; > + } > + > + write_sysreg_s(r, SYS_MPAM2_EL2); Please use the write_sysreg_el2() accessor, so that VHE under NV has an easier time, should we ever get there. > +} > + > +static inline void __deactivate_traps_mpam(void) > +{ > + if (!cpus_support_mpam()) > + return; > + > + write_sysreg_s(0, SYS_MPAM2_EL2); Same thing. > + > + if (mpam_cpus_have_mpam_hcr()) > + write_sysreg_s(MPAMHCR_HOST_FLAGS, SYS_MPAMHCR_EL2); > +} > + Thanks, M. -- Without deviation from the norm, progress is not possible.