From: Marc Zyngier <maz@kernel.org>
To: Sascha Bischoff <Sascha.Bischoff@arm.com>
Cc: "linux-arm-kernel@lists.infradead.org"
<linux-arm-kernel@lists.infradead.org>,
"kvmarm@lists.linux.dev" <kvmarm@lists.linux.dev>,
"linux-kernel@vger.kernel.org" <linux-kernel@vger.kernel.org>,
"kvm@vger.kernel.org" <kvm@vger.kernel.org>, nd <nd@arm.com>,
"oliver.upton@linux.dev" <oliver.upton@linux.dev>,
Joey Gouly <Joey.Gouly@arm.com>,
Suzuki Poulose <Suzuki.Poulose@arm.com>,
"yuzenghui@huawei.com" <yuzenghui@huawei.com>,
"will@kernel.org" <will@kernel.org>,
"tglx@linutronix.de" <tglx@linutronix.de>,
"lpieralisi@kernel.org" <lpieralisi@kernel.org>,
Timothy Hayes <Timothy.Hayes@arm.com>
Subject: Re: [PATCH 1/5] KVM: arm64: Allow ICC_SRE_EL2 accesses on a GICv5 host
Date: Wed, 17 Sep 2025 17:23:08 +0100 [thread overview]
Message-ID: <86o6r9121f.wl-maz@kernel.org> (raw)
In-Reply-To: <20250828105925.3865158-2-sascha.bischoff@arm.com>
On Thu, 28 Aug 2025 11:59:42 +0100,
Sascha Bischoff <Sascha.Bischoff@arm.com> wrote:
>
> The bet0 release of the GICv5 specification didn't include the
> ICC_SRE_EL2 register as part of FEAT_GCIE_LEGACY. This was an
> oversight, and support for this register has been added as of the bet1
> release of the specification.
>
> Remove the guarding in the vGICv3 code that skipped the ICC_SRE_EL2
> accesses for a GICv5 host. As a result of this change, it now becomes
> possible to use nested virtualisation on a GICv5 host when running
> legacy GICv3-based VMs.
>
> Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
I just remembered my promise from almost 3 weeks ago, and just posted
this:
https://lore.kernel.org/r/20250917161935.1630908-1-maz@kernel.org
which kills two birds with one stone. I'll take it as a prefix to this
series.
Thanks,
M.
--
Without deviation from the norm, progress is not possible.
next prev parent reply other threads:[~2025-09-17 16:23 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2025-08-28 10:59 [PATCH 0/5] KVM: arm64: GICv5 legacy (GCIE_LEGACY) NV enablement and cleanup Sascha Bischoff
2025-08-28 10:59 ` [PATCH 1/5] KVM: arm64: Allow ICC_SRE_EL2 accesses on a GICv5 host Sascha Bischoff
2025-08-28 14:05 ` Marc Zyngier
2025-09-17 16:23 ` Marc Zyngier [this message]
2025-08-28 10:59 ` [PATCH 4/5] KVM: arm64: Use ARM64_HAS_GICV5_LEGACY for GICv5 probing Sascha Bischoff
2025-08-28 10:59 ` [PATCH 2/5] KVM: arm64: Enable nested for GICv5 host with FEAT_GCIE_LEGACY Sascha Bischoff
2025-08-28 10:59 ` [PATCH 3/5] arm64: cpucaps: Add GICv5 Legacy vCPU interface (GCIE_LEGACY) capability Sascha Bischoff
2025-09-02 8:23 ` Suzuki K Poulose
2025-08-28 10:59 ` [PATCH 5/5] irqchip/gic-v5: Drop has_gcie_v3_compat from gic_kvm_info Sascha Bischoff
2025-09-03 12:07 ` Thomas Gleixner
2025-09-04 7:57 ` [PATCH 0/5] KVM: arm64: GICv5 legacy (GCIE_LEGACY) NV enablement and cleanup Oliver Upton
2025-09-17 16:42 ` Marc Zyngier
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