Re: [PATCH] arm64: Remove checks for broken Cavium HW from the PI code

[Marc Zyngier <maz@kernel.org>]

On Thu, 17 Apr 2025 15:01:48 +0100,
Will Deacon <will@kernel.org> wrote:
> 
> Hmm, I'm not really sure about this as it seems to be punishing the poor
> user of the box who really hasn't done anything wrong. The firmware might
> not be passing a KASLR seed to the host, but what about guest VMs? It's
> pretty easy for the VMM to stuff a seed into the DT, so if somebody was
> running VMs on TX1 with kaslr before c8c2647e69bed ("arm64: Make
> _midr_in_range_list() an exported function") and things worked, I don't
> think we should be breaking that so that it crashes in weird ways.

That's a good point, and I should have thought of that.

> Could we just read MIDR_EL1 (read_cpuid_id()) in the PI code to detect
> ThunderX that way? I'm less fussed about the multi-MIDR code working on
> this machine as it's a new feature (and we could disable the new
> hypercalls here if we really cared).

Yeah, probably. Let me have a play with this thing again.

> Alternatively, we could properly rip out the TX1 support and fail to boot
> if we detect it. At least that's deterministic and we could have a useful
> error message about the thing being unsupported.

That'd be the last resort, and I'd rather keep this machine alive as
this is the only v8.0 box I have with 16kB page support.

Thanks,

	M.

-- 
Without deviation from the norm, progress is not possible.