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Tue, 20 Aug 2024 15:20:26 +0100 Date: Tue, 20 Aug 2024 15:20:25 +0100 Message-ID: <86plq3xoly.wl-maz@kernel.org> From: Marc Zyngier To: Sebastian Ene Cc: akpm@linux-foundation.org, alexghiti@rivosinc.com, ankita@nvidia.com, ardb@kernel.org, catalin.marinas@arm.com, christophe.leroy@csgroup.eu, james.morse@arm.com, vdonnefort@google.com, mark.rutland@arm.com, oliver.upton@linux.dev, rananta@google.com, ryan.roberts@arm.com, shahuang@redhat.com, suzuki.poulose@arm.com, will@kernel.org, yuzenghui@huawei.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel-team@android.com Subject: Re: [PATCH v8 5/6] KVM: arm64: Initialize the ptdump parser with stage-2 attributes In-Reply-To: <20240816123906.3683425-6-sebastianene@google.com> References: <20240816123906.3683425-1-sebastianene@google.com> <20240816123906.3683425-6-sebastianene@google.com> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/29.4 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: sebastianene@google.com, akpm@linux-foundation.org, alexghiti@rivosinc.com, ankita@nvidia.com, ardb@kernel.org, catalin.marinas@arm.com, christophe.leroy@csgroup.eu, james.morse@arm.com, vdonnefort@google.com, mark.rutland@arm.com, oliver.upton@linux.dev, rananta@google.com, ryan.roberts@arm.com, shahuang@redhat.com, suzuki.poulose@arm.com, will@kernel.org, yuzenghui@huawei.com, kvmarm@lists.linux.dev, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, kernel-team@android.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20240820_072030_254183_CBBF8AB3 X-CRM114-Status: GOOD ( 24.48 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Fri, 16 Aug 2024 13:39:05 +0100, Sebastian Ene wrote: > > Define a set of attributes used by the ptdump parser to display the > properties of a guest memory region covered by a pagetable descriptor. > Build a description of the pagetable levels and initialize the parser > with this configuration. > > Signed-off-by: Sebastian Ene > --- > arch/arm64/kvm/ptdump.c | 135 ++++++++++++++++++++++++++++++++++++++-- > 1 file changed, 129 insertions(+), 6 deletions(-) > > diff --git a/arch/arm64/kvm/ptdump.c b/arch/arm64/kvm/ptdump.c > index 52483d56be2e..79be07ec3c3c 100644 > --- a/arch/arm64/kvm/ptdump.c > +++ b/arch/arm64/kvm/ptdump.c > @@ -14,6 +14,51 @@ > #include > > > +#define MARKERS_LEN (2) > +#define KVM_PGTABLE_MAX_LEVELS (KVM_PGTABLE_LAST_LEVEL + 1) > + > +struct kvm_ptdump_guest_state { > + struct kvm *kvm; > + struct ptdump_pg_state parser_state; > + struct addr_marker ipa_marker[MARKERS_LEN]; > + struct ptdump_pg_level level[KVM_PGTABLE_MAX_LEVELS]; > + struct ptdump_range range[MARKERS_LEN]; > +}; > + > +static const struct ptdump_prot_bits stage2_pte_bits[] = { > + { > + .mask = PTE_VALID, > + .val = PTE_VALID, > + .set = " ", > + .clear = "F", > + }, { > + .mask = KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | PTE_VALID, > + .val = KVM_PTE_LEAF_ATTR_LO_S2_S2AP_R | PTE_VALID, > + .set = "R", > + .clear = " ", > + }, { > + .mask = KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W | PTE_VALID, > + .val = KVM_PTE_LEAF_ATTR_LO_S2_S2AP_W | PTE_VALID, > + .set = "W", > + .clear = " ", > + }, { > + .mask = KVM_PTE_LEAF_ATTR_HI_S2_XN | PTE_VALID, > + .val = PTE_VALID, > + .set = " ", > + .clear = "X", > + }, { > + .mask = KVM_PTE_LEAF_ATTR_LO_S2_AF | PTE_VALID, > + .val = KVM_PTE_LEAF_ATTR_LO_S2_AF | PTE_VALID, > + .set = "AF", > + .clear = " ", > + }, { > + .mask = PTE_TABLE_BIT | PTE_VALID, > + .val = PTE_VALID, > + .set = "BLK", > + .clear = " ", > + }, > +}; > + > static int kvm_ptdump_visitor(const struct kvm_pgtable_visit_ctx *ctx, > enum kvm_pgtable_walk_flags visit) > { > @@ -40,15 +85,81 @@ static int kvm_ptdump_show_common(struct seq_file *m, > return kvm_pgtable_walk(pgtable, 0, BIT(pgtable->ia_bits), &walker); > } > > +static int kvm_ptdump_build_levels(struct ptdump_pg_level *level, u32 start_lvl) > +{ > + static const char * const level_names[] = {"PGD", "PUD", "PMD", "PTE"}; How about 5 level page tables, which we support since v6.8? The architecture uses a SL=-1 in this case, and I have the feeling this is going to expose in a lovely way, given that you use a u32 for start_level... :-/ I also question the use of these names, which have no relation with what the architecture describes (news flash, arm64 isn't just another x86 implementation ;-). I'd rather this displays the actual level, which is something anyone can understand. I think this needs some surgery to handle FEAT_LVA2 properly. Thanks, M. -- Without deviation from the norm, progress is not possible.