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Thu, 22 Jan 2026 11:06:37 +0000 Date: Thu, 22 Jan 2026 11:06:37 +0000 Message-ID: <86tswdc3eq.wl-maz@kernel.org> From: Marc Zyngier To: Will Deacon Cc: linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, Catalin Marinas , Mark Rutland , Joey Gouly , Suzuki K Poulose , Oliver Upton , Zenghui Yu Subject: Re: [PATCH 3/3] arm64: Unconditionally enable EPAN support In-Reply-To: References: <20260107180701.2858276-1-maz@kernel.org> <20260107180701.2858276-4-maz@kernel.org> User-Agent: Wanderlust/2.15.9 (Almost Unreal) SEMI-EPG/1.14.7 (Harue) FLIM-LB/1.14.9 (=?UTF-8?B?R29qxY0=?=) APEL-LB/10.8 EasyPG/1.0.0 Emacs/30.1 (aarch64-unknown-linux-gnu) MULE/6.0 (HANACHIRUSATO) MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Content-Type: text/plain; charset=US-ASCII X-SA-Exim-Connect-IP: 185.219.108.64 X-SA-Exim-Rcpt-To: will@kernel.org, linux-arm-kernel@lists.infradead.org, kvmarm@lists.linux.dev, catalin.marinas@arm.com, mark.rutland@arm.com, joey.gouly@arm.com, suzuki.poulose@arm.com, oupton@kernel.org, yuzenghui@huawei.com X-SA-Exim-Mail-From: maz@kernel.org X-SA-Exim-Scanned: No (on disco-boy.misterjones.org); SAEximRunCond expanded to false X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20260122_030641_012366_9075CAD8 X-CRM114-Status: GOOD ( 20.75 ) X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=archiver.kernel.org@lists.infradead.org On Thu, 22 Jan 2026 10:15:56 +0000, Will Deacon wrote: > > On Wed, Jan 07, 2026 at 06:07:01PM +0000, Marc Zyngier wrote: > > While FEAT_PAN3 is pretty recent, having it permanently enabled costs > > exactly nothing, and does help with exec-only mappings on these fancy > > ARMv9.2 machines that are rumoured to exist. > > I'm not sure it's _entirely_ accurate to say this one costs us "exactly > nothing": > > > diff --git a/arch/arm64/include/asm/cpucaps.h b/arch/arm64/include/asm/cpucaps.h > > index 177c691914f87..13c0fa54ea19f 100644 > > --- a/arch/arm64/include/asm/cpucaps.h > > +++ b/arch/arm64/include/asm/cpucaps.h > > @@ -19,8 +19,6 @@ cpucap_is_possible(const unsigned int cap) > > "cap must be < ARM64_NCAPS"); > > > > switch (cap) { > > - case ARM64_HAS_EPAN: > > - return IS_ENABLED(CONFIG_ARM64_EPAN); > > case ARM64_SVE: > > return IS_ENABLED(CONFIG_ARM64_SVE); > > case ARM64_SME: > > as this means cpus_have_cap(EPAN) always ends up doing a test_bit(). It's > not exactly expensive, but it feels a little premature when compared to > PAN and LSE so I'll probably just take those changes for now. Ah, fair enough. It can probably wait another few years then! Cheers, M. -- Without deviation from the norm, progress is not possible.